FIC a985 Manual Do Serviço
Hardware Functional Overview
FIC A985 Service Manual
4-1
Chapter
4.1 Overview
The FIC A985 notebook consists of several important functions and subsystems including:
•
System Processor – implemented on the motherboard using the Intel uFCPGA
Pentium 4 –M Northwood at 400 MHz Front System Bus speed.
•
System North Bridge Core Logic – implemented on the motherboard using the SIS
650 chipset.
-
CPU Interface
-
AGP BUS Controller
-
DDR DRAM Controller
-
MuTIOL Media I/O
•
System South Bridge Core Logic – implemented on the motherboard using the SIS
961 chipset.
-
Integrated MuTIOL Connect to PCI Bridge
-
Dual IDE Master/Slave Controller, Integrated DMA
•
Clock Frequency Generator – implemented on the motherboard using the ICS 952001
clock generator chip.
•
Cache Memory Subsystem – implemented on-die on the Intel CPU.
-
L1 cache (Pentium Processor Internal)
-
12KB code and 8KB data, which implemented 8 way set associative and write
back
back
-
L2 cache (Pentium Processor Internal)
-
256KB Advanced Transfer Cache,8 way associativity
-
8-way set associative, 32-byte line size, 1 line per sector
•
Video Subsystem – embedded in SIS 650
-
High Performance and high quality 3D accelerator
-
Integrated VB bridge
-
High performance 2D accelerator
-
Complete TV-OUT/Digital Flat Panel Solution
•
VRAM – embedded in SIS 650
-
Share system memory from 8MB up to 64MB
•
PCMCIA Subsystem – implemented on the motherboard using the O2Micro OZ6912
PCI-CARDBUS BRIDGE controller chip.
-
Support Type II x2 (without door)
•
Sound – implemented or integrated in south bridge (SIS 961)
-
AC’97 CODEC
-
Realtek ALC201
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