Toshiba 4006GAH Manual Do Utilizador
360050398
Toshiba Corporation Digital Media Network Company
Page 146 of 157
© 2005, Copyright TOSHIBA Corporation All Rights Reserved
10.12 Reset
A RESET condition sets the drive ( or both drives in case of Drive0/Drive1 connection ) BSY, allowing the
drive to perform the specified initialization required for normal operation.
drive to perform the specified initialization required for normal operation.
A RESET condition can be generated by both hardware and software. There are two hardware resets,
one is by the Host (- RESET) and the other is by the drive power sense circuitry. These resets are set high
when the system and the drive respectively acknowledge specified supply voltage ( See 6.1).
one is by the Host (- RESET) and the other is by the drive power sense circuitry. These resets are set high
when the system and the drive respectively acknowledge specified supply voltage ( See 6.1).
The other reset is software generated. The Host can write to the Device Control register and set the
reset bit. The host software condition will continue until the reset bit is set to zero.
.
Once the reset is negated and the drive is re-enabled, with BSY still active, the drive will perform
necessary hardware initialization, clear any previously programmed drive parameters and revert
to the defaults, load the Task File registers with their initial values, and then clear BSY. No interrupt
is generated when initialization is complete. The initial values ( hex ) for the Task File registers are
as follows.
reset bit. The host software condition will continue until the reset bit is set to zero.
.
Once the reset is negated and the drive is re-enabled, with BSY still active, the drive will perform
necessary hardware initialization, clear any previously programmed drive parameters and revert
to the defaults, load the Task File registers with their initial values, and then clear BSY. No interrupt
is generated when initialization is complete. The initial values ( hex ) for the Task File registers are
as follows.
Table 10.12-1 Initialization of Task File registers
REGISTER POWER
ON
HARDWARE RESET
SOFTWARE RESET
Data 00
00
00
Error 01
01
01
Sector Count
01
01
01
Sector Number
01
01
01
Cylinder Low
00
00
00
Cylinder High
00
00
00
Device/Head Register
00
00
00
Status/Alternate Status
50 or 52
50 or 52
50 or 52
Device address
9
7E or FE
7E or FE
7E or FE
ECC Length
4 bytes
4 bytes
no change(*1)
Data Buffer
undefined
undefined
no change
Addressing mode
default
default
no change
Auto stand-by mode
disable
disable
no change
Read Cache
enable
enable
no change (*1)
Write Cache
10
enable
enable
no change (*1)
Multiple mode
16 sectors
16 sectors
no change (*1)
DMA transfer mode
Multiword
DMA mode 2
Multiword DMA mode
2
no change(*1)
PIO transfer mode
PIO mode 4
flow control
PIO mode 4 flow
control
no change(*1)
(*1): Software reset settings are affected by set feature command.
9
ATA-2 Notes: This register is obsolete. It is recommended that a device not respond to a read of this address. If a
device does respond, it shall be sure not to drive the DD7 signal to prevent possible conflict with floppy disk
implementations.
The drive supports this register to maintain compatibility for ATA-1.
implementations.
The drive supports this register to maintain compatibility for ATA-1.
10
ATA-2 Notes: The default mode for write cache is “disable” after ATA-2. This is violation of ATA-2 specification. This setting can be
changed by factory.