Intel Xeon Dual-Core 5050 HH80555KF0804M Ficha De Dados

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Dual-Core Intel® Xeon® Processor 5000 Series Datasheet

1.

Unless otherwise noted, all specifications in this table apply to all processors and are based on final silicon 

validation/characterization. 

2.

These voltages are targets only. A variable voltage source should exist on systems in the event that a 

different voltage is required. See 

 for more information. 

3.

The voltage specification requirements are measured across the VCC_DIE_SENSE and VSS_DIE_SENSE 

lands and across the VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands with a 100 MHz bandwidth 

oscilloscope, 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance. The maximum length of 

ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled 

in the scope probe. 

4.

The processor must not be subjected to any static V

CC

 level that exceeds the V

CC_MAX

 associated with any 

particular current. Failure to adhere to this specification can shorten processor lifetime.

5.

I

CC_MAX

 is specified at V

CC_MAX

. The processor is capable of drawing I

CC_MAX 

for up to 10 ms. Refer to 

 and 

 for further details on the average processor current draw over various time 

durations.

6.

FMB is the flexible motherboard guideline. These guidelines are for estimation purposes only. 

7.

The current specified is also for HALT and Enhanced HALT State.

8.

These specifications apply to the PLL power lands VCCA, VCCIOPLL, and VSSA. See 

 for 

details. These parameters are based on design characterization and are not tested.

9.

This specification represents the total current for GTLREF_DATA and GTLREF_ADD per core.

10. V

TT

 must be provided via a separate voltage source and must not be connected to V

CC

. This specification is 

measured at the land.

I

CC_RESET

I

CC_RESET

 for Dual-Core Intel Xeon 

Processor 5000 series with multiple 

VID (1066 MHz)

150

A

18

I

CC_RESET

I

CC_RESET

 for Dual-Core Intel Xeon 

Processor 5063 (MV) with multiple 

VID

115

A

18

I

TT

Steady-state FSB Termination 

Current

6.1

A

16

I

TT_POWER-UP

Power-up FSB Termination Current

8.0

A

19

I

CC_TDC

Thermal Design Current (TDC) for 

Dual-Core Intel Xeon Processor 

5000 series (667 MHz)

100

A

6,15

I

CC_TDC

Thermal Design Current (TDC) for 

Dual-Core Intel Xeon Processor 

5000 series (1066 MHz)

130

A

6,15

I

CC_TDC

Thermal Design Current (TDC) for 

Dual-Core Intel Xeon Processor 

5063 (MV)

100

A

6,15

I

CC_VTTOUT

DC current that may be drawn 

from V

TTOUT 

per land 

580

mA

17

I

CC_VCCA

I

CC

 for PLL power lands 

120

mA

8

I

CC_VCCIOPLL

I

CC

 for PLL power lands 

100

mA

8

I

CC_GTLREF

I

CC

 for GTLREF 

200

µA

9

I

TCC

I

CC 

during active thermal control 

circuit (TCC) for Dual-Core Intel 

Xeon Processor 5000 series

150

A

I

TCC

I

CC 

during active thermal control 

circuit (TCC) for Dual-Core Intel 

Xeon Processor 5063 (MV)

115

A

I

SGNT

I

CC

 Stop-Grant for Dual-Core Intel 

Xeon Processor 5000 series (667 

50

A

7

I

SGNT

I

CC

 Stop-Grant for Dual-Core Intel 

Xeon Processor 5000 series (1066 

60

A

7

I

SGNT

I

CC

 Stop-Grant for Dual-Core Intel 

Xeon Processor 5063 (MV)

40

A

7