Intel BX80635E52697V2 Manual Do Utilizador

Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families

73

Datasheet Volume One of Two

 

The processor PECI client will not clear the semaphore that was acquired to service the 

request until the originator sends the ‘retry’ request in a timely fashion to successfully 
retrieve the response data. In the absence of any automatic timeouts, this could tie up 

shared resources and result in artificial bandwidth conflicts.

The PECI host originator should be designed to support all optional but desirable 

features from all processors of interest. Each feature has a discovery method and 
response code that indicates availability on the destination PECI client.

The first step in the enumeration process would be for the PECI host to confirm the 

Revision Number through the use of the GetDIB() command. The revision number 
returned by the PECI client processor always maps to the revision number of the PECI 

specification that it is designed to. The Minor Revision Number as described in 

may be used to identify the subset of PECI commands that the processor in question 
supports for any major PECI revision.

The next step in the enumeration process is to utilize the desired command suite in a 

real execution context. If the Write FCS response is an Abort FCS or if the data 
returned includes an “Unknown/Invalid/Illegal Request” completion code (0x90), then 

the command is unsupported. 

Enumerating known commands without real, execution context data, or attempting 
undefined commands, is dangerous because a write command could result in 

unexpected behavior if the data is not properly formatted. Methods for enumerating 

write commands using carefully constructed and innocuous data are possible, but are 
not guaranteed by the PECI client definition.

This enumeration procedure is not robust enough to detect differences in bit definitions 

or data interpretation in the message payload or client response. Instead, it is only 
designed to enumerate discrete features.

The processor does not support multiple domains, but it is possible that future products 

will, and the following tables are included as a reference for domain-specific definitions.

0b10

1

GetTemp()

0x02

RdPkgConfig()

0xa2

WrPkgConfig()

0xa6

RdIAMSR()

0xb2

RdPCIConfig()

0x62

RdPCIConfigLocal()

0xe2