IBM powerpc 750gx Manual Do Utilizador
User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
gx_03.fm.(1.2)
March 27, 2006
March 27, 2006
Instruction-Cache and Data-Cache Operation
Page 149 of 377
tlbie
TLB invalidate
No
xxx
x
x
Pass TLBI.
—
No action.
—
sync
Synchroniza-
tion
No
xxx
x
x
Pass sync.
—
No action.
—
Table 3-7. MEI State Transitions
(Page 3 of 3)
Operation
Cache
Operation
Bus
Sync
WIM
Current
Cache
State
Next
Cache
State
Cache Actions
Bus Operation
Note: Single-beat writes are not snooped in the write queue.