Murata Electronics North America CCT24 Manual Do Utilizador
Page 57 of 90
CCT24
GpioAlt bit is set for GPIO4, the corresponding GpioSleepMode bit is ignored and GPIO4 is controlled
directly by the GpioSleepState parameter bit 7.
directly by the GpioSleepState parameter bit 7.
GPIO_SleepDir - when GPIO_SleepMode is enabled, this parameter functions as a secondary GPIO_Dir
to set the direction of the GPIOs during a device’s sleep period. This enables the user to provide alternate
configurations during sleep that will help minimize current consumption. Bits 0..5 correspond to GPIO0..
GPIO5. Set a GPIO_SleepDir bit to 1 to specify an output, or to 0 to specify an input.
to set the direction of the GPIOs during a device’s sleep period. This enables the user to provide alternate
configurations during sleep that will help minimize current consumption. Bits 0..5 correspond to GPIO0..
GPIO5. Set a GPIO_SleepDir bit to 1 to specify an output, or to 0 to specify an input.
GPIO_SleepState - when GPIO_SleepMode is enabled, this parameter functions as a bitmask to control
the states of the GPIOs, the RADIO_TXD output, and the /HOST_CTS and /DCD outputs during a de-
vice’s sleep period. This allows the user to set alternate configurations during sleep to minimize current
consumption. Bits 0..5 correspond to GPIO0..GPIO5 respectively. Bit 6 sets the state of RADIO_TXD,
and bit 7 sets the states of /HOST_CTS and /DCD. A sleep state bit is set to 1 to specify a high output, or
to 0 to specify a low output. Bit 6 must be set low in order to achieve minimum sleep current (high imped-
ance load assumed), and the other bits may need to be set low or high depending on their external loads.
When bit 6 is set low, expect a serial “break” condition to occur as the module wakes from sleep. The
serial break condition can be eliminated by setting bit 6 high, but sleep current will be increased.
the states of the GPIOs, the RADIO_TXD output, and the /HOST_CTS and /DCD outputs during a de-
vice’s sleep period. This allows the user to set alternate configurations during sleep to minimize current
consumption. Bits 0..5 correspond to GPIO0..GPIO5 respectively. Bit 6 sets the state of RADIO_TXD,
and bit 7 sets the states of /HOST_CTS and /DCD. A sleep state bit is set to 1 to specify a high output, or
to 0 to specify a low output. Bit 6 must be set low in order to achieve minimum sleep current (high imped-
ance load assumed), and the other bits may need to be set low or high depending on their external loads.
When bit 6 is set low, expect a serial “break” condition to occur as the module wakes from sleep. The
serial break condition can be eliminated by setting bit 6 high, but sleep current will be increased.
PWM0_Init - this parameter sets the initial value for PWM0 at startup.
PWM1_Init - this parameter sets the initial value for PWM1 at startup.
ADC_SampleIntvl - this parameter sets the interval between the beginning of one ADC read cycle and the
next ADC read cycle. The three ADC inputs are read on each ADC read cycle. Each ADC_SampleIntvl
count equals 10 ms. This interval will be the worst-case latency for ADC generated interrupts. This inter-
val is independent of the IO_ReportInterval as the ADCs will be read again on that interval.
next ADC read cycle. The three ADC inputs are read on each ADC read cycle. Each ADC_SampleIntvl
count equals 10 ms. This interval will be the worst-case latency for ADC generated interrupts. This inter-
val is independent of the IO_ReportInterval as the ADCs will be read again on that interval.
ADC0..2_ThresholdLo/Hi - these values define thresholds to trigger an I/O report based on ADC meas-
urements. If I/O reporting is enabled, a single EVENT report containing the contents of the I/O bank is
generated when a threshold is crossed. Reporting is "edge-triggered" with respect to threshold bounda-
ries, not "level-triggered"; i.e., if the measurement remains there, additional reports are not triggered until
the value crosses the threshold again. The thresholds are met whenever one of the following inequalities
are satisfied:
urements. If I/O reporting is enabled, a single EVENT report containing the contents of the I/O bank is
generated when a threshold is crossed. Reporting is "edge-triggered" with respect to threshold bounda-
ries, not "level-triggered"; i.e., if the measurement remains there, additional reports are not triggered until
the value crosses the threshold again. The thresholds are met whenever one of the following inequalities
are satisfied:
ADCx < ADCx_ThresholdLo
ADCx > ADCx_ThresholdHi
ADCx > ADCx_ThresholdHi
IO_ReportTrigger - when a selected trigger source is enabled, a trigger event will cause the remote to
send an EVENT message to its base containing the entire current values of the I/O Register Bank from
GPIO0 up to and including the EventFlags, but not the PWM settings which are output-only.
send an EVENT message to its base containing the entire current values of the I/O Register Bank from
GPIO0 up to and including the EventFlags, but not the PWM settings which are output-only.
bit 7
ADC2 high/low thresholds
bit 6
ADC1 high/low thresholds
bit 5
ADC0 high/low thresholds
bit 4
Periodic report timer
bit 3
GPIO3 edge
bit 2
GPIO2 edge
bit 1
GPIO1 edge
bit 0
GPIO0 edge
I/O reporting is supported for remotes only, not the base.