Intel III Xeon 700 MHz 80526KY7002M Manual Do Utilizador
Códigos do produto
80526KY7002M
MECHANICAL SPECIFICATIONS
68
Table 50. Signal Listing in Order by Pin Number
Pin
No.
No.
Pin Name
Signal Buffer Type
Pin
No.
No.
Pin Name
Signal Buffer Type
A96 VSS
Ground
B96
D#[00]
AGTL+
I/O
A97
BCLK
System Bus Clock
B97
VCC_CORE
Cartridge Vcc
A98
TEST_ VSS _A98
Pull down to VSS B98
RESET#
AGTL+
Input
A99 VSS
Ground
B99
N/C
A100 BERR#
AGTL+
I/O
B100
VCC_CORE
Cartridge
Vcc
A101
A#[33]
AGTL+ I/O
B101
A#[35]
AGTL+ I/O
A102 VSS
Ground
B102
A#[32]
AGTL+
I/O
A103 A#[34]
AGTL+
I/O
B103
VCC_CORE
Cartridge
Vcc
A104
A#[30]
AGTL+ I/O
B104
A#[29]
AGTL+ I/O
A105 VSS
Ground
B105
A#[26]
AGTL+
I/O
A106
A#[31]
AGTL+ I/O
B106
VCC_L2
L2 Cache Vcc
A107
A#[27]
AGTL+ I/O
B107
A#[24]
AGTL+ I/O
A108 VSS
Ground
B108
A#[28]
AGTL+
I/O
A109
A#[22]
AGTL+ I/O
B109
VCC_L2
L2 Cache Vcc
A110
A#[23]
AGTL+ I/O
B110
A#[20]
AGTL+ I/O
A111 VSS
Ground
B111
A#[21]
AGTL+
I/O
A112
A#[19]
AGTL+ I/O
B112
VCC_L2
L2 Cache Vcc
A113
A#[18]
AGTL+ I/O
B113
A#[25]
AGTL+ I/O
A114 VSS
Ground
B114
A#[15]
AGTL+
I/O
A115
A#[16]
AGTL+ I/O
B115
VCC_L2
L2 Cache Vcc
A116
A#[13]
AGTL+ I/O
B116
A#[17]
AGTL+ I/O
A117 VSS
Ground
B117
A#[11]
AGTL+
I/O
A118
A#[14]
AGTL+ I/O
B118
VCC_L2
L2 Cache Vcc
A119 VSS
Ground
B119
A#[12]
AGTL+
I/O
A120
A#[10]
AGTL+ I/O
B120
VCC_L2
L2 Cache Vcc
A121
A#[05]
AGTL+ I/O
B121
A#[08]
AGTL+ I/O
A122 VSS
Ground
B122
A#[07]
AGTL+
I/O
A123
A#[09]
AGTL+ I/O
B123
VCC_L2
L2 Cache Vcc
A124
A#[04]
AGTL+ I/O
B124
A#[03]
AGTL+ I/O
A125 VSS
Ground
B125
A#[06]
AGTL+
I/O
A126 RESERVED_A126 DO
NOT
CONNECT
B126 VCC_L2
L2
Cache
Vcc
A127
BNR#
AGTL+ I/O
B127
AERR#
AGTL+ I/O
A128 VSS
Ground
B128
REQ#[0]
AGTL+
I/O
A129
BPRI#
AGTL+ Input
B129
VCC_L2
L2 Cache Vcc
A130
TRDY#
AGTL+ Input
B130
REQ#[1]
AGTL+ I/O
A131 VSS
Ground
B131
REQ#[4]
AGTL+
I/O
A132
DEFER#
AGTL+ Input
B132
VCC_L2
L2 Cache Vcc
A133
REQ#[2]
AGTL+ I/O
B133
LOCK#
AGTL+ I/O
A134 VSS
Ground
B134
DRDY#
AGTL+
I/O
A135
REQ#[3]
AGTL+ I/O
B135
VCC_L2
L2 Cache Vcc
A136
HITM#
AGTL+ I/O
B136
RS#[0]
AGTL+ Input
A137 VSS
Ground
B137
HIT#
AGTL+
I/O
A138
DBSY#
AGTL+ I/O
B138
VCC_L2
L2 Cache Vcc
A139
RS#[1]
AGTL+ Input
B139
RS#[2]
AGTL+ Input
A140 VSS
Ground
B140
RP#
AGTL+
I/O
A141
BR2#
AGTL+ Input
B141
VCC_L2
L2 Cache Vcc
A142
BR0#
AGTL+ I/O
B142
BR3#
AGTL+ Input
A143 VSS
Ground
B143
BR1#
AGTL+
Input
A144
ADS#
AGTL+ I/O
B144
VCC_L2
L2 Cache Vcc
A145
AP#[0]
AGTL+ I/O
B145
RSP#
AGTL+ Input
A146 VSS
Ground
B146
AP#[1]
AGTL+
I/O
A147
VID_CORE[2]
Open or Short to
VSS
VSS
B147 VCC_L2
L2
Cache
Vcc
A148
VID_CORE[1]
Open or Short to
VSS
VSS
B148 WP
SMBus
Input
A149
VSS
Ground
B149
VID_CORE[3]
Open or Short to VSS