HP A2Y15AV Manual Do Utilizador

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Processor Configuration Registers
160
Datasheet, Volume 2
2.9
Device 2 IO Registers
2.9.1
Index—MMIO Address Register
MMIO_INDEX: A 32 bit I/O write to this port loads the offset of the MMIO register or 
offset into the GTT that needs to be accessed. An I/O Read returns the current value of 
this register. 
This mechanism to access internal graphics MMIO registers must not be used to access 
VGA I/O registers which are mapped through the MMIO space. VGA registers must be 
accessed directly through the dedicated VGA I/O ports.
2.9.2
Data—MMIO Data Register
MMIO_DATA: A 32-bit I/O write to this port is re-directed to the MMIO register/GTT 
location pointed to by the MMIO-index register. A 32-bit I/O read to this port is re-
directed to the MMIO register/GTT location pointed to by the MMIO-index register.
Table 2-12. Device 2 IO Register Address Map
Address 
Offset
Register 
Symbol
Register Name
Reset Value
Access
0–3h
Index
MMIO Address Register
00000000h
 RW
4–7h
Data
MMIO Data Register
00000000h
 RW
B/D/F/Type:
0/2/0/PCI IO
Address Offset:
0–3h
Reset Value:
00000000h
Access:
RW
Size:
32 bits
BIOS Optimal Default
00000000h
Bit
Access
Reset 
Value
RST/
PWR
Description
31:21
RO
0h
Reserved (RSVD) 
20:2
RW
00000h
FLR, 
Uncore
Register/GTT Offset (REGGTTO) 
This field selects any one of the DWord registers within the MMIO 
register space of Device 2 if the target is MMIO Registers.
This field selects a GTT offset if the target is the GTT.
1:0
RW
00b
FLR, 
Uncore
Target (TARG) 
00 = MMIO Registers
01 = GTT
1X = Reserved
B/D/F/Type:
0/2/0/PCI IO
Address Offset:
4–7h
Reset Value:
00000000h
Access:
RW
Size:
32 bits
Bit
Access
Reset 
Value
RST/
PWR
Description
31:0
RW
00000000h
FLR, 
Uncore
MMIO Data Window (DATA) 
This field is the data field associated with the IO2MMIO access.