HP A2Y15AV Manual Do Utilizador

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Datasheet, Volume 2
293
Processor Configuration Registers 
2.18.30 FRCDL_REG—Fault Recording Low Register
This register records fault information when primary fault logging is active. Hardware 
reports the number and location of fault recording registers through the Capability 
register. This register is relevant only for primary fault logging.
This register is sticky and can be cleared only through power good reset or by software 
clearing the RW1C fields by writing a 1.
B/D/F/Type:
0/0/0/GFXVTBAR
Address Offset:
200–207h
Reset Value:
0000000000000000h
Access:
ROS-V
Size:
64 bits
BIOS Optimal Default
0000000000000000h
Bit
Access
Reset 
Value
RST/
PWR
Description
63:12
ROS-V
00000000
00000h
Powergood
Fault Info (FI) 
When the Fault Reason (FR) field indicates one of the DMA-
remapping fault conditions, bits 63:12 of this field contain the 
page address in the faulted DMA request. Hardware treats bits 
63:N as reserved (0), where N is the maximum guest address 
width (MGAW) supported.
When the Fault Reason (FR) field indicates one of the interrupt-
remapping fault conditions, bits 63:48 of this field indicate the 
interrupt_index computed for the faulted interrupt request, and 
bits 47:12 are cleared.
This field is relevant only when the F field is set. 
11:0
RO
0h
Reserved (RSVD)