Intel SC5299UP SC5299UPNA Manual Do Utilizador

Códigos do produto
SC5299UPNA
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Intel
®
 Entry Server Chassis SC5299-E TPS 
Power Sub-system 
Revision 3.1 
 
 
Intel order number D37594-005 
59
Table 67. PSON
#
 Signal Characteristic 
Signal Type
 
Accepts an open collector/drain input from the system. 
Pull-up to VSB located in power supply. 
PSON
#
 = Low  
ON 
PSON
#
 = High or Open 
OFF 
 
MIN MAX 
Logic level low (power supply ON) 
0V 
1.0V 
Logic level high (power supply OFF) 
2.0V 
5.25V 
Source current, Vpson = low 
 
4mA 
Power up delay:    T
pson_on_delay
 5msec 
400msec 
PWOK delay:       T 
pson_pwok
  
50msec 
 
2.3.5.2 
PSKill 
The purpose of the PSKill pin is to allow for hot swapping of the power supply. The PSKill pin on 
the power supply is shorter than the other signal pins. When a power supply is operating in 
parallel with other power supplies and then extracted from the system, the PSKill pin will quickly 
turn off the power supply and prevent arcing of the DC output contacts. T
PSKill
 (shown in the 
following table) is the minimum time delay from the PSKill pin un-mating to when the power pins 
un-mate. The power supply must discharge its output inductor within this time from the un-
mating of the PSKill pin. When the PSKill signal pin is not pulled down or left open (power 
supply is extracted from the system), the power supply will shut down regardless of the 
condition of the PSON# signal. The mating pin of this signal in the system should be tied to 
ground. Internal to the power supply, the PSKill pin should be connected to a standby voltage 
through a pull-up resistor. Upon receiving a LOW state signal at the PSKill pin, the power supply 
will be allowed to turn on via the PSON# signal. A logic LOW on this pin by itself should not turn 
on the power outputs.