Intel G1610T CM8063701445100 Manual Do Utilizador
Códigos do produto
CM8063701445100
Datasheet
217
Serial ATA (SATA)
13.8.41
Enclosure Management Message Format (EM_MF)—Offset 580h
This register is not implemented in VLV.
Access Method
Default: 00000000h
13.8.42
Enclosure Management LED (EM_LED)—Offset 584h
This register is not implemented in VLV.
Access Method
Default: 00000000h
1
1h
RW/O
DEVSLP Present (DSP): If set to 1, the platform supports DEVSLP on this port. If
cleared to 0, the platform does not support DEVSLP on this port.
0
0h
RW
Aggressive DEVSLP Enable (ADSE): When this bit is cleared to 0, the HBA does not
enter DEVSLP unless software directed via PxCMD.ICC. This bit shall only be set to 1 if
PxDEVSLP.DSP is set to 1. If this bit is set to 1 and software clears the bit to 0, then the
HBA shall de-assert the DEVSLP signal if asserted.
Bit
Range
Default &
Access
Description
Type: Memory Mapped I/O Register
(Size: 32 bits)
EM_MF: [ABAR] + 580h
ABAR Type: PCI Configuration Register (Size: 32 bits)
ABAR Reference: [B:0, D:19, F:0] + 24h
ABAR Reference: [B:0, D:19, F:0] + 24h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSV
D
Bit
Range
Default &
Access
Description
31:0
0h
RO
RSVD: Reserved.
Type: Memory Mapped I/O Register
(Size: 32 bits)
EM_LED: [ABAR] + 584h
ABAR Type: PCI Configuration Register (Size: 32 bits)
ABAR Reference: [B:0, D:19, F:0] + 24h
ABAR Reference: [B:0, D:19, F:0] + 24h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RS
VD
Bit
Range
Default &
Access
Description
31:0
0h
RO
RSVD: Reserved.