Intermec 073295-001 Manual Do Utilizador
Chapter 4 — Theory of Operation
I/O Signals
Platform-specific peripheral control input and output signals are
implemented through PXA255 GPIO pins, FPGA (U8) I/O pins, and
through HCR registers U11 and U16. In general, signals are assigned
among these devices according to these criteria:
implemented through PXA255 GPIO pins, FPGA (U8) I/O pins, and
through HCR registers U11 and U16. In general, signals are assigned
among these devices according to these criteria:
PXA255
outputs:
outputs:
Used for signals that must hold their state through
Suspend, and should not immediately be disabled on
a critically low battery event.
Suspend, and should not immediately be disabled on
a critically low battery event.
PXA255 inputs: Used for interrupts that may need to wake the system
from Suspend.
HCR outputs:
Used for peripheral enable signals that must hold their
state through Suspend, but can and should be
immediately “dumped” on a critically low battery
event.
state through Suspend, but can and should be
immediately “dumped” on a critically low battery
event.
FPGA I/O:
Used for I/O that need not function during Suspend,
and can default to their inactive states during
Suspend.
and can default to their inactive states during
Suspend.
As much as possible, the signals assignments are the same as in the 700C
class products, in order to maximize code re-use. See 609918 CX HW/SW
Interface SRS for more detailed information.
class products, in order to maximize code re-use. See 609918 CX HW/SW
Interface SRS for more detailed information.
PXA255 GPIO Signal Descriptions
PXA255 GPIO
Function
Signal Description
Usage
GP0
PSC_IRQ*
Interrupt from PSC PIC. Toggles system between Run and
Suspend.
Suspend.
This is an “Always-enabled” resume source.
PXA255 input
↓
= interrupt
Can wake processor from
Sleep
st
ate.
GP1 KEY_RET0
/
WAKEUP*
Computer on:
Keypad matrix Row 0. This is also available through the FPGA.
Duplicated here so that the eight keys in keypad Row 0 are
functional at boot time, and can be set to wake the computer. (In
both those instances, the FPGA is powered down.)
Duplicated here so that the eight keys in keypad Row 0 are
functional at boot time, and can be set to wake the computer. (In
both those instances, the FPGA is powered down.)
Computer suspended:
System resume interrupt from enabled keypad keys, handle trigger
or tethered scanner trigger, dock port DCD or USB host present.
or tethered scanner trigger, dock port DCD or USB host present.
In this usage, this pin is a wakeup interrupt only. Reading its state
yields no information about what resume event caused the
interrupt.
yields no information about what resume event caused the
interrupt.
This is an “Always-enabled” resume source.
The resume events combined on this input are events that may be
expected to still wake the computer after a battery change (when all
resume pins except GPIO0 and GPIO1 will have been
automatically disabled by the PXA255).
expected to still wake the computer after a battery change (when all
resume pins except GPIO0 and GPIO1 will have been
automatically disabled by the PXA255).
PXA255 input
↓ = interrupt
↓ = interrupt
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