Intel G2120T CM8063701391600 Manual Do Utilizador
Códigos do produto
CM8063701391600
Datasheet, Volume 1
65
Electrical Specifications
7
Electrical Specifications
7.1
Power and Ground Lands
The processor has VCC, VTT, VDDQ, VCCPLL, VAXG, and VSS (ground) inputs for on-
chip power distribution. All power lands must be connected to their respective
processor power planes, while all VSS lands must be connected to the system ground
plane. Use of multiple power and ground planes is recommended to reduce I*R drop.
The VCC lands must be supplied with the voltage determined by the processor Voltage
IDentification (VID) signals. Likewise, the VAXG pins must also be supplied with the
voltage determined by the GFX_VID signals.
chip power distribution. All power lands must be connected to their respective
processor power planes, while all VSS lands must be connected to the system ground
plane. Use of multiple power and ground planes is recommended to reduce I*R drop.
The VCC lands must be supplied with the voltage determined by the processor Voltage
IDentification (VID) signals. Likewise, the VAXG pins must also be supplied with the
voltage determined by the GFX_VID signals.
specifies the voltage level for
the various VIDs.
7.2
Decoupling Guidelines
Due to its large number of transistors and high internal clock speeds, the processor is
capable of generating large current swings between low- and full-power states. This
may cause voltages on power planes to sag below their minimum values, if bulk
decoupling is not adequate. Larger bulk storage (C
capable of generating large current swings between low- and full-power states. This
may cause voltages on power planes to sag below their minimum values, if bulk
decoupling is not adequate. Larger bulk storage (C
BULK
), such as electrolytic capacitors,
supply current during longer lasting changes in current demand (for example, coming
out of an idle condition). Similarly, capacitors act as a storage well for current when
entering an idle condition from a running condition. To keep voltages within
specification, output decoupling must be properly designed.
out of an idle condition). Similarly, capacitors act as a storage well for current when
entering an idle condition from a running condition. To keep voltages within
specification, output decoupling must be properly designed.
Caution:
Design the board to ensure that the voltage provided to the processor remains within
. Failure to do so can result in timing violations or
reduced lifetime of the processor. For further information and design guidelines, refer
to the Voltage Regulator Down (VRD) 11.1 Design Guidelines.
7.2.1
Voltage Rail Decoupling
The voltage regulator solution needs to provide:
• bulk capacitance with low effective series resistance (ESR).
• a low interconnect resistance from the regulator to the socket.
• bulk decoupling to compensate for large current swings generated during power-
• a low interconnect resistance from the regulator to the socket.
• bulk decoupling to compensate for large current swings generated during power-
on, or low-power idle state entry/exit.
The power delivery solution must ensure that the voltage and current specifications are
met, as defined in
met, as defined in