Intel E7-8891 v2 CM8063601377422 Manual Do Utilizador
Códigos do produto
CM8063601377422
14
Intel® Xeon® Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.11.1VID..................................................................................................... 496
14.11.2DID .................................................................................................... 497
14.11.3PCICMD............................................................................................... 497
14.11.4PCISTS................................................................................................ 498
14.11.5RID..................................................................................................... 499
14.11.6CCR .................................................................................................... 499
14.11.7CLSR................................................................................................... 499
14.11.8PLAT ................................................................................................... 500
14.11.9HDR.................................................................................................... 500
14.11.10BIST.................................................................................................. 500
14.11.11SVID ................................................................................................. 500
14.11.12SDID ................................................................................................. 501
14.11.13CAPPTR.............................................................................................. 501
14.11.14INTL .................................................................................................. 501
14.11.15INTPIN............................................................................................... 501
14.11.16MINGNT ............................................................................................. 502
14.11.17MAXLAT ............................................................................................. 502
14.11.18PXPCAP.............................................................................................. 502
14.11.19RX_CTLE_PEAK_GEN2.......................................................................... 503
14.11.20RX_CTLE_PEAK_GEN3.......................................................................... 503
14.11.2DID .................................................................................................... 497
14.11.3PCICMD............................................................................................... 497
14.11.4PCISTS................................................................................................ 498
14.11.5RID..................................................................................................... 499
14.11.6CCR .................................................................................................... 499
14.11.7CLSR................................................................................................... 499
14.11.8PLAT ................................................................................................... 500
14.11.9HDR.................................................................................................... 500
14.11.10BIST.................................................................................................. 500
14.11.11SVID ................................................................................................. 500
14.11.12SDID ................................................................................................. 501
14.11.13CAPPTR.............................................................................................. 501
14.11.14INTL .................................................................................................. 501
14.11.15INTPIN............................................................................................... 501
14.11.16MINGNT ............................................................................................. 502
14.11.17MAXLAT ............................................................................................. 502
14.11.18PXPCAP.............................................................................................. 502
14.11.19RX_CTLE_PEAK_GEN2.......................................................................... 503
14.11.20RX_CTLE_PEAK_GEN3.......................................................................... 503
Figures
10-1 Power and Thermal Management Architecture Overview..........................................66
12-1 Processor integrated I/O device map ....................................................................72
12-2 Processor uncore devices map .............................................................................73
12-1 Processor integrated I/O device map ....................................................................72
12-2 Processor uncore devices map .............................................................................73
Tables
12-1 Functions specifically handled by the processor......................................................75
12-2 RW_LB CSRs list allowed PECI write when not in BMC_INIT mode ............................78
12-3 Register attribute definitions ...............................................................................79
14-1 BDF:BAR# for various MMIO BARs in IIO ............................................................ 189
14-2 Function number of active root ports in port 2(Dev#2) based on port bifurcation...... 190
14-3 Function number of active root ports in port 3(Dev#3) based on port bifurcation...... 190
12-2 RW_LB CSRs list allowed PECI write when not in BMC_INIT mode ............................78
12-3 Register attribute definitions ...............................................................................79
14-1 BDF:BAR# for various MMIO BARs in IIO ............................................................ 189
14-2 Function number of active root ports in port 2(Dev#2) based on port bifurcation...... 190
14-3 Function number of active root ports in port 3(Dev#3) based on port bifurcation...... 190