Finisar FTXD02SL1T Manual Do Utilizador
SNAP12 Modules Product Specification – August 2011
F i n i s a r
Finisar Corporation – 26-August-11 Rev A4 –
Finisar Confidential
Page 3
II.
Receiver Pin Assignment
K
J
H
G
F
E
D
C
B
A
1
Vpp
NIC
NIC
GND
GND
GND
GND
GND
GND
NIC
NIC
NIC
2
Vpp
NIC
NIC
GND
GND
DOUT6N
GND
GND
DOUT9N
GND
NIC
3
NIC
VCC
VCC
GND
DOUT5N
DOUT6P
GND
DOUT8N
DOUT9P
GND
NIC
4
NIC
VCC
VCC
DOUT4N
DOUT5P
GND
DOUT7N
DOUT8P
GND
NIC
NIC
VCC
VCC
5
NIC
VCC
VCC
DOUT4P
GND
DOUT3N
DOUT7P
GND
DOUT10p
GND
6
NIC
VCC
VCC
GND
DOUT2N
DOUT3P
GND
DOUT11p
DOUT10n
GND
NIC
7
NIC
NIC
SD
DOUT1N
DOUT2P
GND
DOUT12p
DOUT11n
GND
NIC
NIC
8
Vpp
-SD12
SD1
DOUT1P
GND
GND
DOUT12n
GND
GND
NIC
NIC
NIC
9
Vpp
RXEN
ENSD
GND
GND
GND
GND
GND
GND
NIC
NIC
10
SQEN
SDA
SCL
NIC
NIC
NIC
NIC
NIC
NIC
NIC
Figure 2 – Receiver 100pin MSA connector assignments as viewed from the topside of the customer line card
(Toward MPO connector end of module)
Signal Name
Signal Description
I/O
Type
DOUT[12:1]P
Receiver Data Non-inverting Input for channels 11 through 0
I
CML
DOUT[12:1]N
Receiver Data Inverting Input for channels 11 through 0
I
CML
NIC
Reserved – Do Not Connect to any voltage on Host PCB
GND
Signal Common ground
SDA
I2C data signal. Internal pull-up with a 10 kΩ resistor.
I/O
SCL
I2C clock signal. Internal pull-up with a 10 kΩ resistor.
I
SQEN
Squelch enable; HIGH = all data outputs driven to logic zero
when SD is active (LOW); LOW = squelch disabled; internal
pull-up
I
LVTTL
ENSD
Signal detect enable; HIGH = normal operation; LOW = signal
detect output(s) forced active; internal pull-up
I
LVTTL
RXEN
Output enable; HIGH = normal operation; LOW = receiver
disabled; internal pull-up
I
LVTTL
SD
Global signal detect; HIGH = normal operation; LOW =
inadequate power on one or more channels
O
LVTTL
SD1
Signal detect channel 1; HIGH = normal operation; LOW =
inadequate power on channel 1
O
LVTTL
Vcc
3.3 V Power supply, external common connection of pins
required
I
Vpp
Not required on this product. Pads not internally connected.
I