Intel Celeron 360 HH80552RE099512 Manual Do Utilizador

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5. 0.24 V is defined at 20% of nominal V

TT

 of 1.2 V.

6. The TAP signal group must meet the signal quality specifications.
7. The maximum output current is based on maximum current handling capability of the buffer and is

not specified into the test load.

8. Leakage to V

SS

 with land held at V

TT

.

9. Leakage to V

TT

 with land held at 300 mV.

V

IL

Input Low Voltage

—

—

0.3

V

V

IH

Input High Voltage

0.9

—

—

V

1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. These parameters are not tested and are based on design simulations.

R

ON

 (BSEL)

Buffer On Resistance

120

Ω

-

R

ON

 (VID)

Buffer On Resistance

120

Ω

-

I

OL

Max Land Current

2.4

mA

-

I

LO

Output Leakage Current

200

µA

3

3. Leakage to V

SS

 with land held at 1.2 V.

V

TOL

Voltage Tolerance

V

TT

(max)

V

-

V

IL

Input Low Voltage

—

—

0.24

V

1

1. These parameters are not tested and are based on design simulations.

V

IH

Input High Voltage

0.96

—

—

V