Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL Ficha De Dados
Códigos do produto
PIC18F87K22-I/PTRSL
PIC18F87K22 FAMILY
DS39960D-page 268
2009-2011 Microchip Technology Inc.
20.4.1
HALF-BRIDGE MODE
In Half-Bridge mode, two pins are used as outputs to
drive push-pull loads. The PWM output signal is output
on the PxA pin, while the complementary PWM output
signal is output on the PxB pin (see
drive push-pull loads. The PWM output signal is output
on the PxA pin, while the complementary PWM output
signal is output on the PxB pin (see
). This
mode can be used for half-bridge applications, as
shown in
shown in
, or for full-bridge applications,
where four power switches are being modulated with
two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in
half-bridge power devices. The value of the PxDC<6:0>
bits of the ECCPxDEL register sets the number of
instruction cycles before the output is driven active. If the
value is greater than the duty cycle, the corresponding
output remains inactive during the entire cycle. For more
details on the dead-band delay operations, see
two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in
half-bridge power devices. The value of the PxDC<6:0>
bits of the ECCPxDEL register sets the number of
instruction cycles before the output is driven active. If the
value is greater than the duty cycle, the corresponding
output remains inactive during the entire cycle. For more
details on the dead-band delay operations, see
Since the PxA and PxB outputs are multiplexed with the
port data latches, the associated TRIS bits must be
cleared to configure PxA and PxB as outputs.
port data latches, the associated TRIS bits must be
cleared to configure PxA and PxB as outputs.
FIGURE 20-6:
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
HALF-BRIDGE PWM
OUTPUT
FIGURE 20-7:
EXAMPLE OF HALF-BRIDGE APPLICATIONS
Period
Pulse Width
td
td
(1)
PxA
(2)
PxB
(2)
td = Dead-Band Delay
Period
(1)
(1)
Note 1:
At this time, the TMR2 register is equal to the
PR2 register.
PR2 register.
2:
Output signals are shown as active-high.
PxA
PxB
FET
Driver
FET
Driver
Load
+
-
+
-
FET
Driver
FET
Driver
V+
Load
FET
Driver
FET
Driver
PxA
PxB
Standard Half-Bridge Circuit (“Push-Pull”)
Half-Bridge Output Driving a Full-Bridge Circuit