Texas Instruments Three Input, Thirteen Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VC L LMK04816BEVAL/NOPB Ficha De Dados
Códigos do produto
LMK04816BEVAL/NOPB
L M K 0 4 8 1 6 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S
SNLU107
31
PLL2 Tab
Figure 12: PLL2 tab
Table 9: Registers Controls and Descriptions in PLL2 tab
Control Name
Register Name
Description
Reference Oscillator
Frequency (MHz)
Frequency (MHz)
OSCin_FREQ
OSCin frequency from the External VCXO
or Crystal.
or Crystal.
Phase Detector Frequency
(MHz)
(MHz)
n/s
PLL2 Phase Detector Frequency (PDF).
This value is calculated as:
PLL2 PDF = OSCin Frequency
*(2
This value is calculated as:
PLL2 PDF = OSCin Frequency
*(2
EN_PLL2_REF_2X
) / PLL2_R.
VCO Frequency (MHz)
n/a
Internal VCO Frequency should be within
the allowable range of the LMK04816B
device.
This value is calculated as:
VCO Frequency = PLL2 PDF * (PLL2_N *
PLL2_P * VCO divider value).
the allowable range of the LMK04816B
device.
This value is calculated as:
VCO Frequency = PLL2 PDF * (PLL2_N *
PLL2_P * VCO divider value).
Doubler
EN_PLL2_REF_2X
PLL2 Doubler.
0 = Bypass Doubler
1 = Enable Doubler
0 = Bypass Doubler
1 = Enable Doubler
R Counter
PLL2_R
PLL2 R Counter value (1 to 4095).
N Counter
PLL2_N
PLL2 N Counter value (1 to 262143).
PLLN Prescaler
PLL2_P
PLL2 N Prescaler value (2 to 8).