Texas Instruments DAC8728EVM - DAC8728 Evaluation Module DAC8728EVM DAC8728EVM Ficha De Dados
![Texas Instruments](https://files.manualsbrain.com/attachments/b46f99d826b2b0e0e5f558c5fb6483942eb9216b/common/fit/150/50/c15ea36eb1fb1cce99a3b94668675bfc78ce832d8d727d9a7bb51a125510/brand_logo.gif)
Códigos do produto
DAC8728EVM
www.ti.com
Parallel Control
4
Parallel Control
Samtec part numbers SSW-110-22-S-D-VS and TSM-110-01-T-DV provide a convenient, 10-pin, dual-row
header/socket combination at J1. This header/socket provides access to the digital control pins of the
EVM. Consult Samtec at
header/socket combination at J1. This header/socket provides access to the digital control pins of the
EVM. Consult Samtec at
or call 1-800-SAMTEC-9 for a variety of mating
connector options.
describes the parallel interface pins.
Table 2. J2: Parallel Interface Pins
Pin Number
Signal
Description
DSP Chip Enable Strobe: Signal is driven
low by the DSP each time a parallel bus
low by the DSP each time a parallel bus
J2.1
CE
write or read occurs and is driven high once
it completes
it completes
DSP Write Strobe: Signal is cycled low to
J2.3
WE
high within the CE strobe when a parallel
bus write occurs
bus write occurs
DSP Read Strobe: Signal is cycled low to
J2.5
RE
high within the CE strobe when a parallel
bus read occurs
bus read occurs
DSP Address line 0: Used in conjunction
J2.7
EVM_A0
with U8 to control LATCH, R/W, CLR and
RST signals
RST signals
DSP Address line 1: Used in conjunction
J2.9
EVM_A1
with U8 to control LATCH, R/W, CLR and
RST signals
RST signals
DSP Address line 2: Used in conjunction
J2.11
EVM_A2
with U8 to control DC_CS and LDAC
DSP Address line 3: Used in conjunction
J2.13
EVM_A3
with U8 to control DC_CS and LDAC
J2.15
Unused
—
J2.17
Unused
—
DSP Interrupt Input: Connects to BUSY
J2.19
INT
output of the DAC8728
5
SBAU161 – February 2010
DAC8728EVM
Copyright © 2010, Texas Instruments Incorporated