Texas Instruments LM3242 6MHz, 750mA Miniature, Adjustable, Step-Down DC-DC EVM LM3242TM-EV/NOPB LM3242TM-EV/NOPB Ficha De Dados
Códigos do produto
LM3242TM-EV/NOPB
SNOSB48D – OCTOBER 2011 – REVISED MARCH 2013
The 9-bump package used for LM3242 has 250 micron solder balls and requires 0.225 mm pads for mounting on
the circuit board. The trace to each pad should enter the pad with a 90°angle to prevent debris from being caught
in deep corners. Initially, the trace to each pad should be 7mil wide, for a section approximately 7mil long, as a
thermal relief. Then each trace should neck up or down to its optimal width. The important criterion is symmetry.
This ensures the solder bumps on the LM3242 re-flow evenly and that the device solders level to the board. In
particular, special attention must be paid to the pads for bumps A3 and C3. Because VIN and GND are typically
connected to large copper planes, inadequate thermal reliefs can result in late or inadequate re-flow of these
bumps.
the circuit board. The trace to each pad should enter the pad with a 90°angle to prevent debris from being caught
in deep corners. Initially, the trace to each pad should be 7mil wide, for a section approximately 7mil long, as a
thermal relief. Then each trace should neck up or down to its optimal width. The important criterion is symmetry.
This ensures the solder bumps on the LM3242 re-flow evenly and that the device solders level to the board. In
particular, special attention must be paid to the pads for bumps A3 and C3. Because VIN and GND are typically
connected to large copper planes, inadequate thermal reliefs can result in late or inadequate re-flow of these
bumps.
The DSBGA package is optimized for the smallest possible size in applications with red or infrared opaque
cases. Because the DSBGA package lacks the plastic encapsulation characteristic of larger devices, it is
vulnerable to light. Backside metallization and/or epoxy coating, along with front-side shading by the printed
circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, DSBGA
devices are sensitive to light, in the red and infrared range, shining on the package’s exposed die edges.
cases. Because the DSBGA package lacks the plastic encapsulation characteristic of larger devices, it is
vulnerable to light. Backside metallization and/or epoxy coating, along with front-side shading by the printed
circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, DSBGA
devices are sensitive to light, in the red and infrared range, shining on the package’s exposed die edges.
It is recommended to add a 10 nF capacitor between VCON and ground for non-standard ESD events or
environments and manufacturing processes. It prevents unexpected output voltage drift.
environments and manufacturing processes. It prevents unexpected output voltage drift.
PCB Board Layout Considerations
Overview
PC board layout is critical to successfully designing a DC-DC converter into a product. As much as a 20 dB
improvement in RX noise floor can be achieved by carefully following recommended layout practices. A properly
planned board layout optimizes the performance of a DC-DC converter and minimizes effects on surrounding
circuitry while also addressing manufacturing issues that can have adverse impacts on board quality and final
product yield.
improvement in RX noise floor can be achieved by carefully following recommended layout practices. A properly
planned board layout optimizes the performance of a DC-DC converter and minimizes effects on surrounding
circuitry while also addressing manufacturing issues that can have adverse impacts on board quality and final
product yield.
PCB Considerations
Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to
EMI, ground bounce, and resistive voltage loss in the traces. Erroneous signals could be sent to the DC-DC
converter IC, resulting in poor regulation or instability. Poor layout can also result in re-flow problems leading to
poor solder joints between the DSBGA package and board pads. Poor solder joints can result in erratic or
degraded performance of the converter.
EMI, ground bounce, and resistive voltage loss in the traces. Erroneous signals could be sent to the DC-DC
converter IC, resulting in poor regulation or instability. Poor layout can also result in re-flow problems leading to
poor solder joints between the DSBGA package and board pads. Poor solder joints can result in erratic or
degraded performance of the converter.
Energy Efficiency
Minimize resistive losses by using wide traces between the power components and doubling up traces on
multiple layers when possible.
multiple layers when possible.
EMI
By its very nature, any switching converter generates electrical noise, and the circuit board designer’s challenge
is to minimize, contain, or attenuate such switcher-generated noise. A high-frequency switching converter, such
as the LM3242, switches Ampere level currents within nanoseconds, and the traces interconnecting the
associated components can act as radiating antennas. The following guidelines are offered to help to ensure that
EMI is maintained within tolerable levels.
is to minimize, contain, or attenuate such switcher-generated noise. A high-frequency switching converter, such
as the LM3242, switches Ampere level currents within nanoseconds, and the traces interconnecting the
associated components can act as radiating antennas. The following guidelines are offered to help to ensure that
EMI is maintained within tolerable levels.
To minimize radiated noise:
•
•
Place the LM3242 switcher, its input capacitor, and output filter inductor and capacitor close together, and
make the interconnecting traces as short as possible.
make the interconnecting traces as short as possible.
•
Arrange the components so that the switching current loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor, through the internal PFET of the LM3242 and the
inductor, to the output filter capacitor, then back through ground, forming a current loop. In the second half of
each cycle, current is pulled up from ground, through the internal synchronous NFET of the LM3242 by the
inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing
these loops so the current curls in the same direction prevents magnetic field reversal between the two half-
cycles and reduces radiated noise.
each cycle, current flows from the input filter capacitor, through the internal PFET of the LM3242 and the
inductor, to the output filter capacitor, then back through ground, forming a current loop. In the second half of
each cycle, current is pulled up from ground, through the internal synchronous NFET of the LM3242 by the
inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing
these loops so the current curls in the same direction prevents magnetic field reversal between the two half-
cycles and reduces radiated noise.
•
Make the current loop area(s) as small as possible.
To minimize ground-plane noise:
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