Microchip Technology MA330028 Ficha De Dados
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dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X and PIC24EPXXXGP/MC20X
DS80000533H-page 14
2011-2014 Microchip Technology Inc.
21. Module: PWM
In Center-Aligned Complementary mode with
Independent Time Base, the PWM generator may
assert the PWMxH output for 100% of the duty
cycle. This has been observed when the value in
its PDCx register is less than one-half the value in
its ALTDTRx register.
Independent Time Base, the PWM generator may
assert the PWMxH output for 100% of the duty
cycle. This has been observed when the value in
its PDCx register is less than one-half the value in
its ALTDTRx register.
Work around
Include a software routine to check that the duty
cycle value written to the PDCx register is always
at least one-half of the value in ALTDTRx.
cycle value written to the PDCx register is always
at least one-half of the value in ALTDTRx.
shows one way of doing this, with
PDCtemp
representing the value to be written to
the PDCx register.
EXAMPLE 2:
WORK AROUND CODE
Affected Families and Silicon Revisions
22. Module: PWM
This issue is applicable when a PWM generator is
configured to operate in Independent Time Base
mode with either Center-Aligned Complementary
mode or Edge-Aligned Complementary mode.
When dead time is non-zero, PWMxL is not
asserted for 100% of the time when PDCx is zero.
Similarly, when dead time is non-zero, PWMxH is
not asserted for 100% of the time when PDCx is
equal to PHASEx. This issue applies to Master
Time Base mode as well.
configured to operate in Independent Time Base
mode with either Center-Aligned Complementary
mode or Edge-Aligned Complementary mode.
When dead time is non-zero, PWMxL is not
asserted for 100% of the time when PDCx is zero.
Similarly, when dead time is non-zero, PWMxH is
not asserted for 100% of the time when PDCx is
equal to PHASEx. This issue applies to Master
Time Base mode as well.
Work around
In Center-Aligned mode:
• To obtain 0% duty cycle, first zero out the
ALTDTRx register, then write zero to the
PDCx register.
PDCx register.
• To obtain 100% duty cycle, first zero out the
ALTDTRx register, then write (PHASEx + 2) to
the PDCx register.
the PDCx register.
In Edge-Aligned mode:
• To obtain 0% duty cycle, first zero out the
registers, DTRx and ALTDTRx, then write
zero to the PDCx register.
zero to the PDCx register.
• To obtain 100% duty cycle, first zero out the
registers, DTRx and ALTDTRx, then write
(PHASEx + 1) to the PDCx register.
(PHASEx + 1) to the PDCx register.
Affected Families and Silicon Revisions
dsPIC33/PIC24EP32 devices
A3
dsPIC33/PIC24EP64 devices
A2, A3
dsPIC33/PIC24EP128 devices
A3
dsPIC33/PIC24EP256 devices
A3
dsPIC33/PIC24EP512 devices
—
Altdtr_by2 = ALTDTRx / 2;
if
(PDCtemp < Altdtr_by2)
{
PDCx = Altdtr_by2;
}
else
{
PDCx = PDCtemp;
}
dsPIC33/PIC24EP32 devices
A3
dsPIC33/PIC24EP64 devices
A2, A3, A8
dsPIC33/PIC24EP128 devices
A3, A8
dsPIC33/PIC24EP256 devices
A3
dsPIC33/PIC24EP512 devices
A7