Microchip Technology DV164136 Ficha De Dados
© 2008 Microchip Technology Inc.
DS39646C-page 183
PIC18F8722 FAMILY
TABLE 17-2:
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON
GIE/GIEH PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
RCON
IPEN
SBOREN
—
RI
TO
PD
POR
BOR
PIR1
PSPIF
ADIF
RC1IF
TX1IF
SSP1IF
CCP1IF
TMR2IF
TMR1IF
PIE1
PSPIE
ADIE
RC1IE
TX1IE
SSP1IE
CCP1IE
TMR2IE
TMR1IE
IPR1
PSPIP
ADIP
RC1IP
TX1IP
SSP1IP
CCP1IP
TMR2IP
TMR1IP
PIR2
OSCFIF
CMIF
—
EEIF
BCL1IF
HLVDIF
TMR3IF
CCP2IF
PIE2
OSCFIE
CMIE
—
EEIE
BCL1IE
HLVDIE
TMR3IE
CCP2IE
IPR2
OSCFIP
CMIP
—
EEIP
BCL1IP
HLVDIP
TMR3IP
CCP2IP
PIR3
SSP2IF
BCL2IF
RC2IF
TX2IF
TMR4IF
CCP5IF
CCP4IF
CCP3IF
PIE3
SSP2IE
BCL2IE
RC2IE
TX2IE
TMR4IE
CCP5IE
CCP4IE
CCP3IE
IPR3
SSP2IP
BCL2IP
RC2IP
TX2IP
TMR4IP
CCP5IP
CCP4IP
CCP3IP
TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
TRISE
TRISE7
TRISE6
TRISE5
TRISE4
TRISE3
TRISE2
TRISE1
TRISE0
TRISG
—
—
—
TRISG4
TRISG3
TRISG2
TRISG1
TRISG0
TRISH
(1)
TRISH7
TRISH6
TRISH5
TRISH4
TRISH3
TRISH2
TRISH1
TRISH0
TMR1L
Timer1 Register Low Byte
TMR1H
Timer1 Register High Byte
T1CON
RD16
T1RUN
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
TMR1CS
TMR1ON
TMR3H
Timer3 Register High Byte
TMR3L
Timer3 Register Low Byte
T3CON
RD16
T3CCP2
T3CKPS1 T3CKPS0
T3CCP1
T3SYNC
TMR3CS
TMR3ON
CCPR1L
Enhanced Capture/Compare/PWM Register 1 Low Byte
CCPR1H
Enhanced Capture/Compare/PWM Register 1 High Byte
CCP1CON
P1M1
P1M0
DC1B1
DC1B0
CCP1M3
CCP1M2
CCP1M1
CCP1M0
CCPR2L
Enhanced Capture/Compare/PWM Register 2 Low Byte
CCPR2H
Enhanced Capture/Compare/PWM Register 2 High Byte
CCP2CON
P2M1
P2M0
DC2B1
DC2B0
CCP2M3
CCP2M2
CCP2M1
CCP2M0
CCP3CON
P3M1
P3M0
DC3B1
DC3B0
CCP3M3
CCP3M2
CCP3M1
CCP3M0
CCP4CON
—
—
DC4B1
DC4B0
CCP4M3
CCP4M2
CCP4M1
CCP4M0
CCP5CON
—
—
DC5B1
DC5B0
CCP5M3
CCP5M2
CCP5M1
CCP5M0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture/Compare, Timer1 or Timer3.
Note 1:
Implemented on 80-pin devices only.