Microchip Technology ARD00354 Ficha De Dados
© 2011 Microchip Technology Inc.
DS25073A-page 25
MCP6N11
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in
.
3.1
Analog Signal Inputs
The non-inverting and inverting inputs (V
IP
, and V
IM
)
are high-impedance CMOS inputs with low bias
currents.
currents.
3.2
Analog Feedback Input
The analog feedback input (V
FG
) is the inverting input
of the second input stage. The external feedback
components (R
components (R
F
and R
G
) are connected to this pin. It is
a high-impedance CMOS input with low bias current.
3.3
Analog Reference Input
The analog reference input (V
REF
) is the non-inverting
input of the second input stage; it shifts V
OUT
to its
desired range. The external gain resistor (R
G
) is
connected to this pin. It is a high-impedance CMOS
input with low bias current.
input with low bias current.
3.4
Analog Output
The analog output (V
OUT
) is a low-impedance voltage
output. It represents the differential input voltage
(V
(V
DM
= V
IP
– V
IM
), with gain G
DM
and is shifted by
V
REF
. The external feedback resistor (R
F
) is connected
to this pin.
3.5
Power Supply Pins
The positive power supply (V
DD
) is 1.8V to 5.5V higher
than the negative power supply (V
SS
). For normal
operation, the other pins are between V
SS
and V
DD
.
Typically, these parts are used in a single (positive)
supply configuration. In this case, V
supply configuration. In this case, V
SS
is connected to
ground and V
DD
is connected to the supply; V
DD
will
need bypass capacitors.
3.6
Digital Enable and V
OS
Calibration
Input
This input (EN/CAL) is a CMOS, Schmitt-triggered
input that controls the active, low power and V
input that controls the active, low power and V
OS
calibration modes of operation. When this pin goes low,
the part is placed into a low power mode and the output
is high-Z. When this pin goes high, the amplifier’s input
offset voltage is corrected by the calibration circuitry,
then the output is re-connected to the V
the part is placed into a low power mode and the output
is high-Z. When this pin goes high, the amplifier’s input
offset voltage is corrected by the calibration circuitry,
then the output is re-connected to the V
OUT
pin, which
becomes low impedance, and the part resumes normal
operation.
operation.
3.7
Exposed Thermal Pad (EP)
There is an internal connection between the Exposed
Thermal Pad (EP) and the V
Thermal Pad (EP) and the V
SS
pin; they must be
connected to the same potential on the Printed Circuit
Board (PCB).
This pad can be connected to a PCB ground plane to
provide a larger heat sink. This improves the package
thermal resistance (
Board (PCB).
This pad can be connected to a PCB ground plane to
provide a larger heat sink. This improves the package
thermal resistance (
θ
JA
).
TABLE 3-1:
PIN FUNCTION TABLE
MCP6N11
Symbol
Description
SOIC
TDFN
1
1
V
FG
Feedback Input
2
2
V
IM
Inverting Input
3
3
V
IP
Non-inverting Input
4
4
V
SS
Negative Power Supply
5
5
V
REF
Reference Input
6
6
V
OUT
Output
7
7
V
DD
Positive Power Supply
8
8
EN/CAL
Enable/V
OS
Calibrate Digital Input
—
9
EP
Exposed Thermal Pad (EP); must be connected to V
SS