Microchip Technology MA330031-2 Ficha De Dados
2011-2013 Microchip Technology Inc.
DS70000657H-page 451
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
TABLE 30-49: I2Cx BUS DATA TIMING REQUIREMENTS (MASTER MODE)
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
(unless otherwise stated)
Operating temperature
-40°C
T
A
+85°C for Industrial
-40°C
T
A
+125°C for Extended
Param
No.
Symbol
Characteristic
)
Min.
(
)
Max.
Units
Conditions
IM10
T
LO
:
SCL
Clock Low Time 100 kHz mode
T
CY
/2 (BRG + 2)
—
s
400 kHz mode
T
CY
/2 (BRG + 2)
—
s
1 MHz mode
(
)
T
CY
/2 (BRG + 2)
—
s
IM11
T
HI
:
SCL
Clock High Time 100 kHz mode
T
CY
/2 (BRG + 2)
—
s
400 kHz mode
T
CY
/2 (BRG + 2)
—
s
1 MHz mode
(
)
T
CY
/2 (BRG + 2)
—
s
IM20
T
F
:
SCL
SDAx and SCLx
Fall Time
Fall Time
100 kHz mode
—
300
ns
C
B
is specified to be
from 10 to 400 pF
400 kHz mode
20 + 0.1 C
B
300
ns
1 MHz mode
(
)
—
100
ns
IM21
T
R
:
SCL
SDAx and SCLx
Rise Time
Rise Time
100 kHz mode
—
1000
ns
C
B
is specified to be
from 10 to 400 pF
400 kHz mode
20 + 0.1 C
B
300 ns
1 MHz mode
(
)
—
300
ns
IM25
T
SU
:
DAT
Data Input
Setup Time
Setup Time
100 kHz mode
250
—
ns
400 kHz mode
100
—
ns
1 MHz mode
(
)
40 —
ns
IM26
T
HD
:
DAT
Data Input
Hold Time
Hold Time
100 kHz mode
0
—
s
400 kHz mode
0
0.9
s
1 MHz mode
(
)
0.2 —
s
IM30
T
SU
:
STA
Start Condition
Setup Time
Setup Time
100 kHz mode
T
CY
/2 (BRG + 2)
—
s
Only relevant for
Repeated Start
condition
Repeated Start
condition
400 kHz mode
T
CY
/2 (BRG + 2)
—
s
1 MHz mode
(
)
T
CY
/2 (BRG + 2)
—
s
IM31
T
HD
:
STA
Start Condition
Hold Time
Hold Time
100 kHz mode
T
CY
/2 (BRG + 2)
—
s
After this period, the
first clock pulse is
generated
first clock pulse is
generated
400 kHz mode
T
CY
/2 (BRG +2)
—
s
1 MHz mode
(
)
T
CY
/2 (BRG + 2)
—
s
IM33
T
SU
:
STO
Stop Condition
Setup Time
Setup Time
100 kHz mode
T
CY
/2 (BRG + 2)
—
s
400 kHz mode
T
CY
/2 (BRG + 2)
—
s
1 MHz mode
(
)
T
CY
/2 (BRG + 2)
—
s
IM34
T
HD
:
STO
Stop Condition
100 kHz mode
T
CY
/2 (BRG + 2)
—
s
Hold Time
400 kHz mode
T
CY
/2 (BRG + 2)
—
s
1 MHz mode
(
)
T
CY
/2 (BRG + 2)
—
s
IM40
T
AA
:
SCL
Output Valid
From Clock
From Clock
100 kHz mode
—
3500
ns
400 kHz mode
—
1000
ns
1 MHz mode
(
)
—
400
ns
IM45
T
BF
:
SDA
Bus Free Time
100 kHz mode
4.7
—
s
Time the bus must be
free before a new
transmission can start
free before a new
transmission can start
400 kHz mode
1.3
—
s
1 MHz mode
(
)
0.5
—
s
IM50
C
B
Bus Capacitive Loading
—
400
pF
IM51
T
PGD
Pulse Gobbler Delay
65
390
ns
(Note
)
Note 1:
BRG is the value of the I
2
C™ Baud Rate Generator. Refer to “Inter-Integrated Circuit (I
2
C™)”
(DS70330) in the “dsPIC33/PIC24 Family Reference Manual”. Please see the Microchip web site for the
latest family reference manual sections.
latest family reference manual sections.
2:
Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only).
3:
Typical value for this parameter is 130 ns.
4:
These parameters are characterized, but not tested in manufacturing.