Microchip Technology MCP1630DM-DDBS1 Ficha De Dados
PIC12F683
DS41211D-page 58
©
2007 Microchip Technology Inc.
8.11
Comparator Voltage Reference
The Comparator Voltage Reference module provides
an internally generated voltage reference for the
comparators. The following features are available:
an internally generated voltage reference for the
comparators. The following features are available:
• Independent from Comparator operation
• Two 16-level voltage ranges
• Output clamped to V
SS
• Ratiometric with V
DD
8.11.1
INDEPENDENT OPERATION
The comparator voltage reference is independent of
the comparator configuration. Setting the VREN bit of
the VRCON register will enable the voltage reference.
the comparator configuration. Setting the VREN bit of
the VRCON register will enable the voltage reference.
8.11.2
OUTPUT VOLTAGE SELECTION
The
CV
REF
voltage reference has 2 ranges with 16
voltage levels in each range. Range selection is
controlled by the VRR bit of the VRCON register. The
16 levels are set with the VR<3:0> bits of the VRCON
register.
controlled by the VRR bit of the VRCON register. The
16 levels are set with the VR<3:0> bits of the VRCON
register.
The CV
REF
output voltage is determined by the following
equations:
EQUATION 8-1:
CV
REF
OUTPUT VOLTAGE
The full range of V
SS
to V
DD
cannot be realized due to
the construction of the module. See Figure 8-1.
8.11.3
OUTPUT CLAMPED TO V
SS
The CV
REF
output voltage can be set to Vss with no
power consumption by configuring VRCON as follows:
• VREN =
0
• VRR =
1
• VR<3:0> =
0000
This allows the comparator to detect a zero-crossing
while not consuming additional CV
while not consuming additional CV
REF
module current.
8.11.4
OUTPUT RATIOMETRIC TO VDD
The comparator voltage reference is V
DD
derived and
therefore, the CV
REF
output changes with fluctuations in
V
DD
. The tested absolute accuracy of the Comparator
Voltage Reference can be found in Section 15.0
“Electrical Specifications”.
“Electrical Specifications”.
V
RR
1 (low range):
=
V
RR
0 (high range):
=
CV
REF
(V
DD
/4) +
=
CV
REF
(VR<3:0>/24)
V
DD
×
=
(VR<3:0>
V
DD
/32)
×
REGISTER 8-3:
VRCON: VOLTAGE REFERENCE CONTROL REGISTER
R/W-0
U-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
VREN
—
VRR
—
VR3
VR2
VR1
VR0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
VREN: CV
REF
Enable bit
1
= CV
REF
circuit powered on
0
= CV
REF
circuit powered down, no I
DD
drain and CV
REF
= V
SS
.
bit 6
Unimplemented: Read as ‘
0
’
bit 5
VRR: CV
REF
Range Selection bit
1
= Low range
0
= High range
bit 4
Unimplemented: Read as ‘
0
’
bit 3-0
VR<3:0>: CV
REF
Value Selection 0
≤
VR<3:0>
≤
15
When VRR =
1
: CV
REF
= (VR<3:0>/24) * V
DD
When VRR =
0
: CV
REF
= V
DD
/4 + (VR<3:0>/32) * V
DD