Microchip Technology MCP1630DM-DDBS1 Ficha De Dados
©
2007 Microchip Technology Inc.
DS41211D-page 73
PIC12F683
10.2
Reading the EEPROM Data
Memory
Memory
To read a data memory location, the user must write the
address to the EEADR register and then set control bit
RD of the EECON1 register, as shown in Example 10-1.
The data is available, at the very next cycle, in the
EEDAT register. Therefore, it can be read in the next
instruction. EEDAT holds this value until another read, or
until it is written to by the user (during a write operation).
address to the EEADR register and then set control bit
RD of the EECON1 register, as shown in Example 10-1.
The data is available, at the very next cycle, in the
EEDAT register. Therefore, it can be read in the next
instruction. EEDAT holds this value until another read, or
until it is written to by the user (during a write operation).
EXAMPLE 10-1:
DATA EEPROM READ
10.3
Writing to the EEPROM Data
Memory
Memory
To write an EEPROM data location, the user must first
write the address to the EEADR register and the data
to the EEDAT register. Then the user must follow a
specific sequence to initiate the write for each byte, as
shown in Example 10-2.
write the address to the EEADR register and the data
to the EEDAT register. Then the user must follow a
specific sequence to initiate the write for each byte, as
shown in Example 10-2.
EXAMPLE 10-2:
DATA EEPROM WRITE
The write will not initiate if the above sequence is not
exactly followed (write 55h to EECON2, write AAh to
EECON2, then set WR bit) for each byte. We strongly
recommend that interrupts be disabled during this
code segment. A cycle count is executed during the
required sequence. Any number that is not equal to the
required cycles to execute the required sequence will
prevent the data from being written into the EEPROM.
exactly followed (write 55h to EECON2, write AAh to
EECON2, then set WR bit) for each byte. We strongly
recommend that interrupts be disabled during this
code segment. A cycle count is executed during the
required sequence. Any number that is not equal to the
required cycles to execute the required sequence will
prevent the data from being written into the EEPROM.
Additionally, the WREN bit in EECON1 must be set to
enable write. This mechanism prevents accidental
writes to data EEPROM due to errant (unexpected)
code execution (i.e., lost programs). The user should
keep the WREN bit clear at all times, except when
updating EEPROM. The WREN bit is not cleared
by hardware.
enable write. This mechanism prevents accidental
writes to data EEPROM due to errant (unexpected)
code execution (i.e., lost programs). The user should
keep the WREN bit clear at all times, except when
updating EEPROM. The WREN bit is not cleared
by hardware.
After a write sequence has been initiated, clearing the
WREN bit will not affect this write cycle. The WR bit will
be inhibited from being set unless the WREN bit is set.
WREN bit will not affect this write cycle. The WR bit will
be inhibited from being set unless the WREN bit is set.
At the completion of the write cycle, the WR bit is
cleared in hardware and the EE Write Complete
Interrupt Flag bit (EEIF) is set. The user can either
enable this interrupt or poll this bit. The EEIF bit of the
PIR1 register must be cleared by software.
cleared in hardware and the EE Write Complete
Interrupt Flag bit (EEIF) is set. The user can either
enable this interrupt or poll this bit. The EEIF bit of the
PIR1 register must be cleared by software.
10.4
Write Verify
Depending on the application, good programming
practice may dictate that the value written to the data
EEPROM should be verified (see Example 10-3) to the
desired value to be written.
practice may dictate that the value written to the data
EEPROM should be verified (see Example 10-3) to the
desired value to be written.
EXAMPLE 10-3:
WRITE VERIFY
10.4.1
USING THE DATA EEPROM
The data EEPROM is a high-endurance, byte
addressable array that has been optimized for the
storage of frequently changing information (e.g.,
program variables or other data that are updated often).
When variables in one section change frequently, while
variables in another section do not change, it is possible
to exceed the total number of write cycles to the
EEPROM (specification D124) without exceeding the
total number of write cycles to a single byte
(specifications D120 and D120A). If this is the case,
then a refresh of the array must be performed. For this
reason, variables that change infrequently (such as
constants, IDs, calibration, etc.) should be stored in
Flash program memory.
addressable array that has been optimized for the
storage of frequently changing information (e.g.,
program variables or other data that are updated often).
When variables in one section change frequently, while
variables in another section do not change, it is possible
to exceed the total number of write cycles to the
EEPROM (specification D124) without exceeding the
total number of write cycles to a single byte
(specifications D120 and D120A). If this is the case,
then a refresh of the array must be performed. For this
reason, variables that change infrequently (such as
constants, IDs, calibration, etc.) should be stored in
Flash program memory.
BANKSEL
EEADR
;
MOVLW
CONFIG_ADDR ;
MOVWF
EEADR
;Address to read
BSF
EECON1,RD
;EE Read
MOVF
EEDAT,W
;Move data to W
BANKSEL
EECON1
;
BSF
EECON1,WREN
;Enable write
BCF
INTCON,GIE
;Disable INTs
BTFSC
INTCON,GIE
;See AN576
GOTO
$-2
;
MOVLW
55h
;Unlock write
MOVWF
EECON2
;
MOVLW
AAh
;
MOVWF
EECON2
;
BSF
EECON1,WR
;Start the write
BSF
INTCON,GIE
;Enable INTS
R
equ
ir
e
d
S
e
q
uen
ce
BANKSEL EEDAT
;
MOVF
EEDAT,W
;EEDAT not changed
;from previous write
BSF
EECON1,RD
;YES, Read the
;value written
XORWF
EEDAT,W
BTFSS
STATUS,Z
;Is data the same
GOTO
WRITE_ERR
;No, handle error
:
;Yes, continue