Microchip Technology MA330019 Ficha De Dados

© 2007-2012 Microchip Technology Inc.

DS70291G-page  15

FLTA1
PWM1L1
PWM1H1
PWM1L2
PWM1H2
PWM1L3
PWM1H3
FLTA2
PWM2L1
PWM2H1

I

O
O
O
O
O
O

I

O
O

ST

—
—
—
—
—
—

ST

—
—

Yes

No
No
No
No
No
No

Yes

No
No

PWM1 Fault A input.
PWM1 Low output 1
PWM1 High output 1
PWM1 Low output 2
PWM1 High output 2
PWM1 Low output 3
PWM1 High output 3
PWM2 Fault A input.
PWM2 Low output 1
PWM2 High output 1

PGED1
PGEC1
PGED2
PGEC2
PGED3
PGEC3

I/O

I

I/O

I

I/O

I

ST
ST
ST
ST
ST
ST

No
No
No
No
No
No

Data I/O pin for programming/debugging communication channel 1.
Clock input pin for programming/debugging communication channel 1.
Data I/O pin for programming/debugging communication channel 2.
Clock input pin for programming/debugging communication channel 2.
Data I/O pin for programming/debugging communication channel 3.
Clock input pin for programming/debugging communication channel 3.

MCLR

I/P

ST

No

Master Clear (Reset) input. This pin is an active-low Reset to the 
device.

AV

DD

P

P

No

Positive supply for analog modules. This pin must be connected at all 
times.

AV

SS

P

P

No

Ground reference for analog modules.

V

DD

P

—

No

Positive supply for peripheral logic and I/O pins.

V

CAP

P

—

No

CPU logic filter capacitor connection.

V

SS

P

—

No

Ground reference for logic and I/O pins.

V

REF

+

I

Analog

No

Analog voltage reference (high) input.

V

REF

-

I

Analog

No

Analog voltage reference (low) input.

Legend: CMOS = CMOS compatible input or output

Analog = Analog input

P = Power

 

ST = Schmitt Trigger input with CMOS levels

O = Output

I = Input 

 

PPS = Peripheral Pin Select

TTL = TTL input buffer