STMicroelectronics M95M02-DRMN6TP Memory IC M95M02-DRMN6TP Ficha De Dados

DocID18203 Rev 8

The Identification Page (256 bytes) is an additional page which can be written and (later) 
permanently locked in Read-only mode.

Reading this page is achieved with the Read Identification Page instruction (see 

The Chip Select signal (S) is first driven low, the bits of the instruction byte and address 
bytes are then shifted in, on Serial Data Input (D). Address bit A10 must be 0, upper address 
bits are Don't Care, and the data byte pointed to by the lower address bits [A7:A0] is shifted 
out on Serial Data Output (Q). If Chip Select (S) continues to be driven low, the internal 
address register is automatically incremented, and the byte of data at the new address is 
shifted out.

The number of bytes to read in the ID page must not exceed the page boundary, otherwise 
unexpected data is read (e.g.: when reading the ID page from location 90d, the number of 
bytes should be less than or equal to 166d, as the ID page boundary is 256 bytes).

The read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip 
Select (S) signal can occur at any time during the cycle. The first byte addressed can be any 
byte within any page.

The instruction is not accepted, and is not executed, if a write cycle is currently in progress.

MS30907V1

C

D

S

Q

23

2

1

3

4

5

6

7

8

9 10

28 29 30 31 32 33 34 35

22 21

3

2

1

0

36 37 38

7

6

5

4

3

1

7

0

High impedance

Data Out 1

Instruction

24-bit address

0

MSB

MSB

2

39

Data Out 2