STMicroelectronics M95M02-DRMN6TP Memory IC M95M02-DRMN6TP Ficha De Dados
Códigos do produto
M95M02-DRMN6TP
DC and AC parameters
M95M02-DR
DocID18203 Rev 8
Table 13. AC characteristics
Test conditions specified in
and
Symbol
Alt.
Parameter
Min.
Max.
Unit
f
C
f
SCK
Clock frequency
D.C.
-
MHz
t
SLCH
t
CSS1
S active setup time
60
-
ns
t
SHCH
t
CSS2
S not active setup time
60
-
ns
t
SHSL
t
CS
S deselect time
90
-
ns
t
CHSH
t
CSH
S active hold time
60
-
ns
t
CHSL
S not active hold time
60
-
ns
t
CH
(1)
1. t
CH
+ t
CL
must never be lower than the shortest possible clock period, 1/f
C
(max).
t
CLH
Clock high time
90
-
ns
t
CL
t
CLL
Clock low time
90
-
ns
t
CLCH
(2)
2. Characterized only, not tested in production.
t
RC
Clock rise time
-
2
µs
t
CHCL
t
FC
Clock fall time
-
2
µs
t
DVCH
t
DSU
Data in setup time
20
-
ns
t
CHDX
t
DH
Data in hold time
20
-
ns
t
HHCH
Clock low hold time after HOLD not active
60
-
ns
t
HLCH
Clock low hold time after HOLD active
60
-
ns
t
CLHL
Clock low set-up time before HOLD active
0
-
ns
t
CLHH
Clock low set-up time before HOLD not
active
active
0
-
ns
t
SHQZ
t
DIS
Output disable time
-
80
ns
t
CLQV
t
V
Clock low to output valid
-
80
ns
t
CLQX
t
HO
Output hold time
0
-
ns
t
t
RO
Output rise time
-
80
ns
t
QHQL
t
FO
Output fall time
-
80
ns
t
HHQV
t
LZ
HOLD high to output valid
-
80
ns
t
HLQZ
t
HZ
HOLD low to output high-Z
-
80
ns
t
W
t
WC
Write time
-
10
ms