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© 2009 Microchip Technology Inc.
DS41341E-page 95
PIC16F72X/PIC16LF72X
8.0
DEVICE CONFIGURATION
Device Configuration consists of Configuration Word 1
and Configuration Word 2 registers, Code Protection
and Device ID.
8.1
Configuration Words
There are several Configuration Word bits that allow
different oscillator and memory protection options.
These are implemented as Configuration Word 1
register at 2007h and Configuration Word 2 register at
2008h. These registers are only accessible during
programming.
              
REGISTER 8-1:
CONFIG1: CONFIGURATION WORD REGISTER 1
R/P-1
R/P-1
U-1
(4)
R/P-1
R/P-1
R/P-1
DEBUG
PLLEN
BORV
BOREN1
BOREN0
bit 15
bit 8
U-1
(4)
R/P-1
R/P-1
R/P-1
R/P-1
R/P-1
R/P-1
R/P-1
CP
MCLRE
PWRTE
WDTE
FOSC2
FOSC1
FOSC0
bit 7
bit 0
Legend:
P = Programmable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 13
DEBUG: In-Circuit Debugger Mode bit
1
 = In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins
0
 = In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger
bit 12
PLLEN: INTOSC PLL Enable bit
0
 = INTOSC Frequency is 500 kHz
1
 = INTOSC Frequency is 16 MHz (32x)
bit 11
Unimplemented: Read as ‘1’
bit 10
BORV: Brown-out Reset Voltage selection bit
0
 = Brown-out Reset Voltage (V
BOR
) set to 2.5 V nominal
1
 = Brown-out Reset Voltage (V
BOR
) set to 1.9 V nominal
bit 9-8
BOREN<1:0>: Brown-out Reset Selection bits
(1)
0x
 = BOR disabled (Preconditioned State)
10
 = BOR enabled during operation and disabled in Sleep
11
 = BOR enabled
bit 7
Unimplemented: Read as ‘1’
bit 6
CP: Code Protection bit
(2)
1
 = Program memory code protection is disabled
0
 = Program memory code protection is enabled
bit 5
MCLRE: RE3/MCLR pin function select bit
(3)
1
 = RE3/MCLR pin function is MCLR
0
 = RE3/MCLR pin function is digital input, MCLR internally tied to V
DD
bit 4
PWRTE: Power-up Timer Enable bit
1
 = PWRT disabled
0
 = PWRT enabled
bit 3
WDTE: Watchdog Timer Enable bit
1
 = WDT enabled
0
 = WDT disabled
Note
1:
Enabling Brown-out Reset does not automatically enable Power-up Timer.
2:
The entire program memory will be erased when the code protection is turned off.
3:
When MCLR is asserted in INTOSC or RC mode, the internal clock oscillator is disabled.
4:
MPLAB
®
 IDE masks unimplemented Configuration bits to ‘0’.