Microchip Technology MA330011 Ficha De Dados
©
2007 Microchip Technology Inc.
Preliminary
DS70165E-page 293
dsPIC33F
23.2
On-Chip Voltage Regulator
All of the dsPIC33F devices power their core digital
logic at a nominal 2.5V. This may create an issue for
designs that are required to operate at a higher typical
voltage, such as 3.3V. To simplify system design, all
devices in the dsPIC33F family incorporate an on-chip
regulator that allows the device to run its core logic from
V
logic at a nominal 2.5V. This may create an issue for
designs that are required to operate at a higher typical
voltage, such as 3.3V. To simplify system design, all
devices in the dsPIC33F family incorporate an on-chip
regulator that allows the device to run its core logic from
V
DD
.
The regulator provides power to the core from the other
V
V
DD
pins. When the regulator is enabled, a low-ESR
(less than 5 ohms) capacitor (such as tantalum or
ceramic) must be connected to the V
ceramic) must be connected to the V
DDCORE
/V
CAP
pin
(Figure 23-1). This helps to maintain the stability of the
regulator. The recommended value for the filter capac-
itor is provided in
TABLE 26-12: “Internal Voltage Regulator Specifi-
cations” located in Section 26.1 “DC Characteris-
tics”.
regulator. The recommended value for the filter capac-
itor is provided in
TABLE 26-12: “Internal Voltage Regulator Specifi-
cations” located in Section 26.1 “DC Characteris-
tics”.
On a POR
,
it takes approximately 20
μ
s for the on-chip
voltage regulator to generate an output voltage. During
this time, designated as T
this time, designated as T
STARTUP
, code execution is
disabled. T
STARTUP
is applied every time the device
resumes operation after any power-down.
FIGURE 23-1:
CONNECTIONS FOR THE
ON-CHIP VOLTAGE
REGULATOR
ON-CHIP VOLTAGE
REGULATOR
(1)
PWMPIN
FPOR
Motor Control PWM Module Pin Mode bit
1
= PWM module pins controlled by PORT register at device Reset
(tri-stated)
0
= PWM module pins controlled by PWM module at device Reset
(configured as output pins)
HPOL
FPOR
Motor Control PWM High Side Polarity bit
1
= PWM module high side output pins have active-high output polarity
0
= PWM module high side output pins have active-low output polarity
LPOL
FPOR
Motor Control PWM Low Side Polarity bit
1
= PWM module low side output pins have active-high output polarity
0
= PWM module low side output pins have active-low output polarity
FPWRT<2:0>
FPOR
Power-on Reset Timer Value Select bits
111
= PWRT = 128 ms
110
= PWRT = 64 ms
101
= PWRT = 32 ms
100
= PWRT = 16 ms
011
= PWRT = 8 ms
010
= PWRT = 4 ms
001
= PWRT = 2 ms
000
= PWRT = Disabled
Reserved
RESERVED3,
FPOR
Reserved (either read as ‘
1
’ and write as ‘
1
’, or read as ‘
0
’ and
write as ‘
0
’)
—
FGS, FOSCSEL,
FOSC, FWDT,
FPOR
Unimplemented (read as ‘
0
’, write as ‘
0
’)
TABLE 23-2:
dsPIC33F CONFIGURATION BITS DESCRIPTION (CONTINUED)
Bit Field
Register
Description
Note
1:
These are typical operating voltages. Refer
to TABLE 26-12: “Internal Voltage Regu-
lator Specifications” located in
Section 26.1 “DC Characteristics” for the
full operating ranges of V
to TABLE 26-12: “Internal Voltage Regu-
lator Specifications” located in
Section 26.1 “DC Characteristics” for the
full operating ranges of V
DD
and V
DDCORE
.
V
DD
V
DDCORE
/V
CAP
V
SS
dsPIC33F
C
F
3.3V