Microchip Technology MA330028 Ficha De Dados
2011-2013 Microchip Technology Inc.
DS70000657H-page 443
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
TABLE 30-45: SPI1 SLAVE MODE (FULL-DUPLEX, CKE = 1, CKP = 0, SMP = 0)
TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
(unless otherwise stated)
Operating temperature
-40°C
T
A
+85°C for Industrial
-40°C
T
A
+125°C for Extended
Param.
Symbol
Characteristic
(
)
Min.
Typ.
(
)
Max.
Units
Conditions
SP70
FscP
Maximum SCK1 Input
Frequency
Frequency
—
—
Lesser of
F
P
or 15
MHz
)
SP72
TscF
SCK1 Input Fall Time
—
—
—
ns
(Note
SP73
TscR
SCK1 Input Rise Time
—
—
—
ns
(Note
SP30
TdoF
SDO1 Data Output Fall Time
—
—
—
ns
See Parameter
(Note
SP31
TdoR
SDO1 Data Output Rise Time
—
—
—
ns
(Note
SP35
TscH2doV,
TscL2doV
TscL2doV
SDO1 Data Output Valid after
SCK1 Edge
SCK1 Edge
—
6
20
ns
SP36
TdoV2scH,
TdoV2scL
TdoV2scL
SDO1 Data Output Setup to
First SCK1 Edge
First SCK1 Edge
30
—
—
ns
SP40
TdiV2scH,
TdiV2scL
TdiV2scL
Setup Time of SDI1 Data Input
to SCK1 Edge
to SCK1 Edge
30
—
—
ns
SP41
TscH2diL,
TscL2diL
TscL2diL
Hold Time of SDI1 Data Input
to SCK1 Edge
to SCK1 Edge
30
—
—
ns
SP50
TssL2scH,
TssL2scL
TssL2scL
SS1
to SCK1 or SCK1
Input
120
—
—
ns
SP51
TssH2doZ
SS1
to SDO1 Output
High-Impedance
10
—
50
ns
)
SP52
TscH2ssH
TscL2ssH
TscL2ssH
SS1
after SCK1 Edge
1.5 T
CY
+ 40
—
—
ns
)
SP60
TssL2doV
SDO1 Data Output Valid after
SS1 Edge
SS1 Edge
—
—
50
ns
Note 1:
These parameters are characterized, but are not tested in manufacturing.
2:
Data in “Typical” column is at 3.3V, +25°C unless otherwise stated.
3:
The minimum clock period for SCK1 is 66.7 ns. Therefore, the SCK1 clock generated by the master must
not violate this specification.
not violate this specification.
4:
Assumes 50 pF load on all SPI1 pins.