Freescale Semiconductor KIT912F634EVME Evaluation Kit KIT912F634EVME KIT912F634EVME Ficha De Dados
Códigos do produto
KIT912F634EVME
Functional Description and Application Information
32 kbyte Flash Module (S12SFTSR32KV1)
MM912F634
Freescale Semiconductor
278
4.36.3.4
Flash Status Register (FSTAT)
The FSTAT register defines the operational status of the Flash module.
In normal mode, CCIF, PVIOL, and ACCERR are readable and writable. CCIF and BLANK are readable and not writable. The
remaining bits read 0 and are not writable.
remaining bits read 0 and are not writable.
In special mode, BLANK and FAIL are readable and writable. FAIL must be clear when starting a command write sequence.
Table 364. Flash Status Register (FSTAT - Normal Mode)
0x0105
7
6
5
4
3
2
1
0
R
CBEIF
CCIF
PVIOL
ACCERR
0
BLANK
0
0
W
Reset
1
1
0
0
0
0
0
0
Table 365. Flash Status Register (FSTAT - Special Mode)
0x0105
7
6
5
4
3
2
1
0
R
CBEIF
CCIF
PVIOL
ACCERR
0
BLANK
FAIL
0
W
Reset
1
1
0
0
0
0
0
0
Table 366. FSTAT Field Descriptions
Field
Description
7
CBEIF
Command Buffer Empty Interrupt Flag — The CBEIF flag indicates that the command buffer is empty so that a new
command write sequence can be started when performing burst programming. Writing a 0 to the CBEIF flag has no effect on
CBEIF. Writing a 0 to CBEIF after writing an aligned address to the Flash array memory, but before CBEIF is cleared, will abort
a command write sequence and cause the ACCERR flag to be set. Writing a 0 to CBEIF outside of a command write sequence
will not set the ACCERR flag. The CBEIF flag is cleared by writing a 1 to CBEIF. The CBEIF flag is used together with the CBEIE
bit in the FCNFG register to generate an interrupt request (see
command write sequence can be started when performing burst programming. Writing a 0 to the CBEIF flag has no effect on
CBEIF. Writing a 0 to CBEIF after writing an aligned address to the Flash array memory, but before CBEIF is cleared, will abort
a command write sequence and cause the ACCERR flag to be set. Writing a 0 to CBEIF outside of a command write sequence
will not set the ACCERR flag. The CBEIF flag is cleared by writing a 1 to CBEIF. The CBEIF flag is used together with the CBEIE
bit in the FCNFG register to generate an interrupt request (see
).
0 Command buffers are full.
1 Command buffers are ready to accept a new command.
1 Command buffers are ready to accept a new command.
6
CCIF
Command Complete Interrupt Flag — The CCIF flag indicates that there are no more commands pending. The CCIF flag is
cleared when CBEIF is cleared and sets automatically upon completion of all active and pending commands. The CCIF flag
does not set when an active program command completes, and a pending burst program command is fetched from the
command buffer. Writing to the CCIF flag has no effect on CCIF. The CCIF flag is used together with the CCIE bit in the FCNFG
register to generate an interrupt request (see
cleared when CBEIF is cleared and sets automatically upon completion of all active and pending commands. The CCIF flag
does not set when an active program command completes, and a pending burst program command is fetched from the
command buffer. Writing to the CCIF flag has no effect on CCIF. The CCIF flag is used together with the CCIE bit in the FCNFG
register to generate an interrupt request (see
).
0 Command in progress.
1 All commands are completed.
1 All commands are completed.
5
PVIOL
Protection Violation Flag —The PVIOL flag indicates an attempt was made to program or erase an address in a protected
area of the Flash memory or Flash IFR during a command write sequence. Writing a 0 to the PVIOL flag has no effect on PVIOL.
The PVIOL flag is cleared by writing a 1 to PVIOL. While PVIOL is set, it is not possible to launch a command or start a
command write sequence.
0 No protection violation detected.
1 Protection violation has occurred.
area of the Flash memory or Flash IFR during a command write sequence. Writing a 0 to the PVIOL flag has no effect on PVIOL.
The PVIOL flag is cleared by writing a 1 to PVIOL. While PVIOL is set, it is not possible to launch a command or start a
command write sequence.
0 No protection violation detected.
1 Protection violation has occurred.
4
ACCERR
Access Error Flag — The ACCERR flag indicates an illegal access has occurred to the Flash memory or Flash IFR, caused
by either a violation of the command write sequence (see
by either a violation of the command write sequence (see
), issuing an illegal
Flash command (see
), or the execution of a CPU STOP instruction while a command is executing (CCIF = 0). Writing
a 0 to the ACCERR flag has no effect on ACCERR. The ACCERR flag is cleared by writing a 1 to ACCERR.While ACCERR is
set, it is not possible to launch a command or start a command write sequence.
0 No access error detected.
1 Access error has occurred.
set, it is not possible to launch a command or start a command write sequence.
0 No access error detected.
1 Access error has occurred.