Freescale Semiconductor TWR-S12G64 Scalable Platform for Automotive Applications TWR-S12G64-KIT TWR-S12G64-KIT Ficha De Dados
Códigos do produto
TWR-S12G64-KIT
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
495
Chapter 14
Analog-to-Digital Converter (ADC12B12CV2)
Analog-to-Digital Converter (ADC12B12CV2)
Revision History
Version
Number
Revision
Date
Effective
Date
Author
Description of Changes
V02.00
13 May 2009
13 May 2009
Initial version copied from V01.06,
changed unused Bits in ATDDIEN to read logic 1
changed unused Bits in ATDDIEN to read logic 1
V02.01
30.Nov 2009
30.Nov 2009
Updated
description of internal channels.
Updated register ATDDR (left/right justified result) description
in section
Updated register ATDDR (left/right justified result) description
in section
and
and
added table
to improve feature description.
V02.02
09 Feb 2010
09 Feb 2010
Fixed typo in
- conversion result for 3mV and 10bit
resolution
V02.03
26 Feb 2010
26 Feb 2010
Corrected
Analog Input Channel Select Coding -
description of internal channels.
V02.04
14 Apr 2010
14 Apr 2010
Corrected typos to be in-line with SoC level pin naming
conventions for VDDA, VSSA, VRL and VRH.
conventions for VDDA, VSSA, VRL and VRH.
V02.05
25 Aug 2010
25 Aug 2010
Removed feature of conversion during STOP and general
wording clean up done in
wording clean up done in
V02.06
09 Sep 2010
09 Sep 2010
Update of internal only information.
V02.07
11 Feb 2011
11 Feb 2011
Connectivity Information regarding internal channel_6 added
to
to
.
V02.08
29 Mar 2011
29 Mar 2011
Fixed typo in bit description field
for bits CD, CC,
CB, CA. Last sentence contained a wrong highest channel
number (it is not AN7 to AN0 instead it is AN11 to AN0).
number (it is not AN7 to AN0 instead it is AN11 to AN0).
V02.09
22. Jun 2012
22. Jun 2012
Update of register write access information in section
.
V02.10
29 Jun 2012
29. Jun 2012
Removed IP name in block diagram
V02.11
02 Oct 2012
02 Oct 2012
Added user information to avoid maybe false external trigger
events when enabling the external trigger mode
(
events when enabling the external trigger mode
(
).