Analog Devices ADP1660 Evaluation Board ADP1660CB-EVALZ ADP1660CB-EVALZ Ficha De Dados
Códigos do produto
ADP1660CB-EVALZ
Data Sheet
ADP1660
Rev. 0 | Page 13 of 28
INDEPENDENT TRIGGER MODES
allows for independent triggering of each LED at a current level
between the configured flash currents and TxMASK currents.
In independent trigger mode, the STROBE pin controls LED1,
and the GPIO pin controls LED2 (see Figure 24).
• When the STROBE or GPIO pin goes high, the current
between the configured flash currents and TxMASK currents.
In independent trigger mode, the STROBE pin controls LED1,
and the GPIO pin controls LED2 (see Figure 24).
• When the STROBE or GPIO pin goes high, the current
produced at the LED1 or LED2 pin is at the level specified
by the I_FL1 bits (Register 0x06) or the I_FL2 bits
(Register 0x09), respectively.
by the I_FL1 bits (Register 0x06) or the I_FL2 bits
(Register 0x09), respectively.
• When the STROBE or GPIO pin goes low, the current
produced at the LED1 or LED2 pin is at the level specified
by the I_TX1 bits (Register 0x07) or the I_TX2 bits
(Register 0x0A), respectively.
by the I_TX1 bits (Register 0x07) or the I_TX2 bits
(Register 0x0A), respectively.
LED1 CURRENT
I_TX1
I_FL1
STROBE
LED2 CURRENT
I_TX2
I_FL2
GPIO
1
1018-
019
Figure 24. Independent Trigger Mode
When the LED_MOD bits are set to 100, the flash timer is used.
If both LEDs are on for a combined time that is equal to the value
specified by the FL_TIM bits (both outputs OR’ed), the
If both LEDs are on for a combined time that is equal to the value
specified by the FL_TIM bits (both outputs OR’ed), the
sets both LED_ENx bits to 0 and sets LED_MOD to 000.
The independent trigger modes (LED_MOD bits set to 100 or
101) present a possible overtemperature risk; careful evaluation
of their implementation must be performed. Before enabling either
independent trigger mode, contact your local Analog Devices
The independent trigger modes (LED_MOD bits set to 100 or
101) present a possible overtemperature risk; careful evaluation
of their implementation must be performed. Before enabling either
independent trigger mode, contact your local Analog Devices
Field Applications Engineer for assistance.
FIXED 5 V OUTPUT MODE
allows
VOUT to be regulated to 5 V. In this mode, the total output current
must be kept below 500 mA. Enabling one or both LEDs allows
must be kept below 500 mA. Enabling one or both LEDs allows
low levels of current to the LEDs.
In fixed 5 V output mode, the VOUT pin is connected to the SW
node when the
In fixed 5 V output mode, the VOUT pin is connected to the SW
node when the
directly to a positive external voltage source; doing so causes
current to flow from VOUT to the battery. Changing the mode
to standby (LED_MOD = 000) ends voltage regulation; VOUT
current to flow from VOUT to the battery. Changing the mode
to standby (LED_MOD = 000) ends voltage regulation; VOUT
returns to a value that is approximately the same as VIN.
FREQUENCY FOLDBACK
The optional frequency foldback feature optimizes efficiency
by reducing the switching frequency to 1.5 MHz when the value
of V
by reducing the switching frequency to 1.5 MHz when the value
of V
IN
is slightly less than the value of V
OUT
. To enable frequency
foldback, set the FREQ_FB bit to 1 in Register 0x03.
LOW BATTERY LED CURRENT FOLDBACK
As the battery discharges, the lower battery voltage results in
higher peak currents through the battery ESR, which may cause
early shutdown of other devices on the battery. The
higher peak currents through the battery ESR, which may cause
early shutdown of other devices on the battery. The
includes an optional low battery detection feature, which reduces
the flash current to a value from 0 mA to 750 mA when the battery
voltage falls below a programmable level. The low battery current
level can be set from 0 mA to 750 mA using the I_VB_LO bits
the flash current to a value from 0 mA to 750 mA when the battery
voltage falls below a programmable level. The low battery current
level can be set from 0 mA to 750 mA using the I_VB_LO bits
(Bits[5:0]) in Register 0x05.
To enable low battery detection and to specify the voltage at
which this detection becomes active, set the V_VB_LO bits
(Bits[2:0]) in Register 0x04 (see Table 8).
To enable low battery detection and to specify the voltage at
which this detection becomes active, set the V_VB_LO bits
(Bits[2:0]) in Register 0x04 (see Table 8).
Table 8. V
DD
Level for Low Battery Detection
V_VB_LO Bit Value
V
DD
Level for Low Battery Detection (V)
000
Low battery detection disabled (default)
001
3.3
010
3.35
011
3.4
100
3.45
101
3.5
110
3.55
111
3.6
If a low battery fault is detected within a programmed window of
detection, the lower current is latched for the remainder of the
flash. The window size is specified by the V_BATT_WINDOW
detection, the lower current is latched for the remainder of the
flash. The window size is specified by the V_BATT_WINDOW
bits (Bits[4:3]) in Register 0x04 (see Table 9).
Table 9. Low Battery Detection Window Size
V_BATT_WINDOW
Bit Value
Bit Value
Window Size (ms)
00
Window disabled; low battery detection
is enabled for the entire flash period
01
1
10
2
11
5 (default)
By reducing the window size to the beginning of the flash only,
the user can reduce the chance of partial exposure of the picture
in the case that the image sensor is using a rolling scan. If a global
scan is used, it is recommended that the low battery detection
window be disabled, thereby providing low voltage protection
the user can reduce the chance of partial exposure of the picture
in the case that the image sensor is using a rolling scan. If a global
scan is used, it is recommended that the low battery detection
window be disabled, thereby providing low voltage protection
throughout the flash time.