Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Ficha De Dados
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AT91SAM9N12-EK
Glossary
Glossary-2
Copyright © 2001-2003 ARM Limited. All rights reserved.
ARM DDI0198D
Advanced High-performance Bus (AHB)
The AMBA Advanced High-performance Bus system connects embedded processors
such as an ARM core to high-performance peripherals, DMA controllers, on-chip
memory, and interfaces. It is a high-speed, high-bandwidth bus that supports
multi-master bus management to maximize system performance.
such as an ARM core to high-performance peripherals, DMA controllers, on-chip
memory, and interfaces. It is a high-speed, high-bandwidth bus that supports
multi-master bus management to maximize system performance.
See also Advanced Microcontroller Bus Architecture and AHB-Lite.
Advanced Microcontroller Bus Architecture (AMBA)
AMBA is the ARM open standard for multi-master on-chip buses, capable of running
with multiple masters and slaves. It is an on-chip bus specification that details a strategy
for the interconnection and management of functional blocks that make up a
System-on-Chip (SoC). It aids in the development of embedded processors with one or
more CPUs or signal processors and multiple peripherals. AMBA complements a
reusable design methodology by defining a common backbone for SoC modules. AHB
conforms to this standard.
with multiple masters and slaves. It is an on-chip bus specification that details a strategy
for the interconnection and management of functional blocks that make up a
System-on-Chip (SoC). It aids in the development of embedded processors with one or
more CPUs or signal processors and multiple peripherals. AMBA complements a
reusable design methodology by defining a common backbone for SoC modules. AHB
conforms to this standard.
Advanced Peripheral Bus (APB)
The AMBA Advanced Peripheral Bus is a simpler bus protocol than AHB. It is designed
for use with ancillary or general-purpose peripherals such as timers, interrupt
controllers, UARTs, and I/O ports. Connection to the main system bus is through a
system-to-peripheral bus bridge that helps to reduce system power consumption.
for use with ancillary or general-purpose peripherals such as timers, interrupt
controllers, UARTs, and I/O ports. Connection to the main system bus is through a
system-to-peripheral bus bridge that helps to reduce system power consumption.
See also Advanced High-performance Bus.
AHB
See Advanced High-performance Bus.
Aligned
Aligned data items are stored so that their address is divisible by the highest power of
two that divides their size. Aligned words and halfwords have addresses that are
divisible by four and two respectively. The terms word-aligned and halfword-aligned
therefore stipulate addresses that are divisible by four and two respectively. Other
related terms are defined similarly.
two that divides their size. Aligned words and halfwords have addresses that are
divisible by four and two respectively. The terms word-aligned and halfword-aligned
therefore stipulate addresses that are divisible by four and two respectively. Other
related terms are defined similarly.
AMBA
See Advanced Microcontroller Bus Architecture.
AP
See Access permission.
APB
See Advanced Peripheral Bus.
Application Specific Integrated Circuit (ASIC)
An integrated circuit that has been designed to perform a specific application function.
It can be custom-built or mass-produced.
It can be custom-built or mass-produced.
Application Specific Standard Part/Product (ASSP)
An integrated circuit that has been designed to perform a specific application function.
Usually consists of two or more separate circuit functions combined as a building block
suitable for use in a range of products for one or more specific application markets.
Usually consists of two or more separate circuit functions combined as a building block
suitable for use in a range of products for one or more specific application markets.