Atmel SAM4S Xplained Pro Starter and Evaluation Kit ATSAM4S-XPRO ATSAM4S-XPRO Ficha De Dados
Códigos do produto
ATSAM4S-XPRO
1197
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
46.1.2 Flash
46.1.2.1
Flash: Incorrect Flash Read May Occur Depending on VDDIO Voltage and Flash Wait State
Flash read issues leading to wrong instruction fetch or incorrect data read may occur under the following operating
conditions:
VDDIO < 2.4V and Flash wait state
VDDIO < 2.4V and Flash wait state
≥ 1
If the core clock frequency does not require the use of the Flash wait state
(FWS = 0 in EEFC_FMR) or if only data
reads are performed on the Flash (e.g., if the code is running out of SRAM), there are no constraints on VDDIO voltage.
.
Notes:
for the maximum core clock frequency at zero (0) wait
state.
Problem Fix/Workaround
Two workarounds are available:
1. Reduce the device speed to decrease the number of wait states to 0.
2. Copy the code from Flash to SRAM at 0 wait states and then run the code out of SRAM.
2. Copy the code from Flash to SRAM at 0 wait states and then run the code out of SRAM.
The issue will be corrected in the next device revision, Marketing Revision Level B (MRL B). Please contact your local
Sales Representative for further details.
46.1.2.2
Flash: Read Error after a GPNVM or Lock Bit Writing
The sequence below leads to a bad read value.
Fail sequence is:
Fail sequence is:
Read Flash @ address XXX
Programming Flash: Write GPNVM or Lock Bit instructions
Read Flash @ address XXX
Programming Flash: Write GPNVM or Lock Bit instructions
Read Flash @ address XXX
Problem Fix/Workaround
A dummy read at another address needs to be included in the sequence.
Sequence is:
Sequence is:
Read Flash @ address XXX
Programming Flash: Write GPNVM or Lock Bit instructions
Read Flash @ address YYY (dummy read)
Read Flash @ address XXX
Programming Flash: Write GPNVM or Lock Bit instructions
Read Flash @ address YYY (dummy read)
Read Flash @ address XXX
46.1.3 Watchdog
46.1.3.1
Watchdog Not Stopped in Wait Mode
When the Watchdog is enabled and the bit WAITMODE = 1 is used to enter wait mode, the watchdog is not halted. If the
time spent in Wait Mode is longer than the Watchdog time-out, the device will be reset if Watchdog reset is enabled.
Problem Fix/Workaround
When entering wait mode, the Wait For Event (WFE) instruction of the processor Cortex-M4 must be used with the
SLEEPDEEP of the System Control Register (SCB_SCR) of the Cortex-M = 0.