Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Ficha De Dados

Códigos do produto
AT91SAM9N12-EK
Página de 1104
442
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Notes: 1. M[1:0] is the byte address inside a 32-bit word. 
2. Bk[1] = BA1, Bk[0] = BA0
Table 31-14. SDR-SDRAM Configuration Mapping: 4K Rows, 256/512/1024/2048 Columns
CPU Address Line
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bk[1:0]
Row[11:0]
Column[7:0]
M[1:0]
Bk[1:0]
Row[11:0]
Column[8:0]
M[1:0]
Bk[1:0]
Row[11:0]
Column[9:0]
M[1:0]
Bk[1:0]
Row[11:0]
Column[10:0]
M[1:0]
Table 31-15. SDR-SDRAM Configuration Mapping: 8K Rows, 256/512/1024/2048 Columns
CPU Address Line
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bk[1:0]
Row[12:0]
Column[7:0]
M[1:0]
Bk[1:0]
Row[12:0]
Column[8:0]
M[1:0]
Bk[1:0]
Row[12:0]
Column[9:0]
M[1:0]
Bk[1:0]
Row[12:0]
Column[10:0]
M[1:0]