Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Ficha De Dados

764

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

A start frame delimiter is to be configured using the ONEBIT field in the US_MR register. It consists of a user-defined

pattern that indicates the beginning of a valid data. 

 illustrates these patterns. If the start frame delimiter,

also known as the start bit, is one bit, (ONEBIT to 1), a logic zero is Manchester encoded and indicates that a new
character is being sent serially on the line. If the start frame delimiter is a synchronization pattern also referred to as sync
(ONEBIT to 0), a sequence of three bit times is sent serially on the line to indicate the start of a new character. The sync
waveform is in itself an invalid Manchester waveform as the transition occurs at the middle of the second bit time. Two
distinct sync patterns are used: the command sync and the data sync. The command sync has a logic one level for one
and a half bit times, then a transition to logic zero for the second one and a half bit times. If the MODSYNC field in the
US_MR is set to 1, the next character is a command. If it is set to 0, the next character is a data. When direct memory
access is used, the MODSYNC field can be immediately updated with a modified character located in memory.
To enable this mode, VAR_SYNC field in US_MR register must be set to 1. In this case, the MODSYNC field in the
US_MR is bypassed and the sync configuration is held in the TXSYNH in the US_THR. The USART character format is

modified and includes sync information.

Manchester

encoded

data

Txd

SFD

DATA

8 bit width "ALL_ONE"  Preamble

Manchester

encoded

data

Txd

SFD

DATA

8 bit width "ALL_ZERO"  Preamble

Manchester

encoded

data

Txd

SFD

DATA

8 bit width "ZERO_ONE" Preamble

Manchester

encoded

data

Txd

SFD

DATA

8 bit width "ONE_ZERO" Preamble