Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Ficha De Dados
Códigos do produto
AT91SAM9X25-EK
24
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
7.1
Chip Identification
Chip ID: 0x819A_05A1
Chip ID Extension: 4
JTAG ID: 0x05B2_F03F
ARM926 TAP ID: 0x0792_603F
7.2
Backup Section
The SAM9X25 features a Backup Section that embeds:
RC Oscillator
Slow Clock Oscillator
Real Time Counter (RTC)
Shutdown Controller
4 Backup Registers
Slow Clock Controller Configuration Register (SCKC_CR)
Boot Sequence Configuration Register (BSC_CR)
A part of the Reset Controller (RSTC)
This section is powered by the VDDBU rail.
8.
Peripherals
8.1
Peripheral Mapping
As shown in
, the Peripherals are mapped in the upper 256 Mbytes of the address space between the
addresses 0xF000 _000 and 0xFFFF_C000.
Each User Peripheral is allocated 16 Kbytes of address space.
8.2
Peripheral Identifiers
defines the Peripheral Identifiers of the SAM9X25. A peripheral identifier is required for the control of the
peripheral interrupt with the Advanced Interrupt Controller and for the control of the peripheral clock with the Power
Management Controller.
Management Controller.