Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Ficha De Dados

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Atmel | SMART SAM D20 [DATASHEET]

Atmel-42129K–SAM-D20_datasheet–06/2014

The RTC bus clock (CLK_RTC_APB) can be enabled and disabled in the Power Manager, and the default state of 
CLK_RTC_APB can be found in the Peripheral Clock Masking section in the 

A generic clock (GCLK_RTC) is required to clock the RTC. This clock must be configured and enabled in the Generic 
Clock Controller before using the RTC. Refer to 

This generic clock is asynchronous to the user interface clock (CLK_RTC_APB). Due to this asynchronicity, accessing 
certain registers will require synchronization between the clock domains. Refer to 

 for 

further details.

The RTC should never be used with the generic clock generator 0.

Not applicable.

The interrupt request line is connected to the Interrupt Controller. Using the RTC interrupts requires the interrupt 
controller to be configured first. Refer to 

 for details.

To use the RTC event functionality, the corresponding events need to be configured in the event system. Refer to 

 for details. 

When the CPU is halted in debug mode the RTC will halt normal operation. The RTC can be forced to continue operation 
during debugging. Refer to the 

 register for details.

All registers with write-access are optionally write-protected by the peripheral access controller (PAC), except the 
following registers:

z

Interrupt Flag Status and Clear register (INTFLAG - refer to 

)

z

z

Status register (STATUS - refer to 

z

)

Write-protection is denoted by the Write-Protection property in the register description. 

When the CPU is halted in debug mode, all write-protection is automatically disabled.

Write-protection does not apply for accesses through an external debugger. Refer to 

A 32.768kHz crystal can be connected to the XIN32 and XOUT32 pins, along with any required load capacitors. For 
details on recommended crystal characteristics and load capacitors, refer to 

details.