Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Ficha De Dados

Códigos do produto
ATSAM4S-WPIR-RD
Página de 1231
1071
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
The gain is configurable through the GAIN bit of the Channel Gain Register (ADC_CGR) as shown in 
To allow full range, analog offset of the ADC can be configured by the OFFSET bit of the Channel Offset Register 
(ADC_COR). The Offset is only available in Single Ended Mode. 
Table 42-6.
Gain of the Sample and Hold Unit: GAIN Bits and DIFF Bit.
GAIN[0:1]
GAIN (DIFF = 0)
GAIN (DIFF = 1)
00
1
0.5
01
1
1
10
2
2
11
4
2
Table 42-7.
Offset of the Sample and Hold Unit: OFFSET DIFF and Gain (G)
OFFSET Bit
OFFSET (DIFF = 0)
OFFSET (DIFF = 1)
0
0
0
1
(G-1)Vrefin/2