Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Ficha De Dados

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SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

< Means that accesses are observed in program order, that is, A1 is always observed

before A2.

The following table describes the behavior of accesses to each region in the memory map.

Note:

1. See 

 for more information.

The Code, SRAM, and external RAM regions can hold programs. However, ARM recommends that programs 

always use the Code region. This is because the processor has separate buses that enable instruction fetches and 

data accesses to occur simultaneously. 
The MPU can override the default memory access behavior described in this section. For more information, see 

.

When a system includes caches or shared memory, some memory regions have additional access constraints, 

and some regions are subdivided, as 

 shows.

0x00000000–0x1FFFFFFF

Code

Normal

–

Executable region for program code. Data can also be 

put here.

0x20000000–0x3FFFFFFF

SRAM

Normal

–

Executable region for data. Code can also be put here. 

This region includes bit band and bit band alias areas, 

.

0x40000000–0x5FFFFFFF

Peripheral

Device

XN

This region includes bit band and bit band alias areas, 

.

0x60000000–0x9FFFFFFF

External RAM

Normal

–

Executable region for data

0xA0000000–0xDFFFFFFF

External device

Device

XN

External Device memory

0xE0000000–0xE00FFFFF

Private Peripheral Bus Strongly- 

ordered

XN

This region includes the NVIC, system timer, and system 

control block.

0xE0100000–0xFFFFFFFF

Reserved

Device

XN

Reserved

0x00000000–0x1FFFFFFF

Code

Normal

–

WT

0x20000000–0x3FFFFFFF

SRAM

Normal

–

WBWA

0x40000000–0x5FFFFFFF

Peripheral

Device

–

–

0x60000000–0x7FFFFFFF

External RAM

Normal

–

WBWA

0x80000000–0x9FFFFFFF

WT