Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Ficha De Dados
Códigos do produto
AT32UC3A3-XPLD
796
32072H–AVR32–10/2012
AT32UC3A3
29.6.7
ADC Timings
Each ADC has its own minimal startup time that is defined through the Start Up Time field in the
Mode Register (MR.STARTUP). This startup time is given in the Electrical Characteristics
chapter.
Mode Register (MR.STARTUP). This startup time is given in the Electrical Characteristics
chapter.
In the same way, a minimal sample and hold time is necessary for the ADC to guarantee the
best converted final value between two channels selection. This time has to be defined through
the Sample and Hold Time field in the Mode Register (MR.SHTIM). This time depends on the
input impedance of the analog input, but also on the output impedance of the driver providing the
signal to the analog input, as there is no input buffer amplifier.
best converted final value between two channels selection. This time has to be defined through
the Sample and Hold Time field in the Mode Register (MR.SHTIM). This time depends on the
input impedance of the analog input, but also on the output impedance of the driver providing the
signal to the analog input, as there is no input buffer amplifier.
29.6.8
Conversion Performances
For performance and electrical characteristics of the ADC, see the Electrical Characteristics
chapter.
chapter.