Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Ficha De Dados
Códigos do produto
AT32UC3A3-XPLD
912
32072H–AVR32–10/2012
AT32UC3A3
33.6
Module Configuration
The specific configuration for each AES instance is listed in the following tables.The module bus
clocks listed here are connected to the system bus clocks according to the table in the System
Bus Clock Connections section.
clocks listed here are connected to the system bus clocks according to the table in the System
Bus Clock Connections section.
Table 33-5.
Module clock name
Module name
Clock name
AES
CLK_AES
Table 33-6.
Register Reset Values
Register
Reset Value
VERSION
0x00000123