Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Ficha De Dados
Códigos do produto
AT32UC3A3-XPLD
945
32072H–AVR32–10/2012
AT32UC3A3
35.5.2
Public JTAG Instructions
The JTAG standard defines a number of public JTAG instructions. These instructions are
described in the sections below.
described in the sections below.
35.5.2.1
IDCODE
This instruction selects the 32 bit Device Identification register (DID) as Data Register. The DID
register consists of a version number, a device number, and the manufacturer code chosen by
JEDEC. This is the default instruction after a JTAG reset. Details about the DID register can be
found in the module configuration section at the end of this chapter.
register consists of a version number, a device number, and the manufacturer code chosen by
JEDEC. This is the default instruction after a JTAG reset. Details about the DID register can be
found in the module configuration section at the end of this chapter.
Starting in Run-Test/Idle, the Device Identification register is accessed in the following way:
1.
Select the IR Scan path.
2.
In Capture-IR: The IR output value is latched into the shift register.
3.
In Shift-IR: The instruction register is shifted by the TCK input.
4.
Return to Run-Test/Idle.
5.
Select the DR Scan path.
6.
In Capture-DR: The IDCODE value is latched into the shift register.
7.
In Shift-DR: The IDCODE scan chain is shifted by the TCK input.
8.
Return to Run-Test/Idle.
35.5.2.2
SAMPLE_PRELOAD
This instruction takes a snap-shot of the input/output pins without affecting the system operation,
and pre-loading the scan chain without updating the DR-latch. The boundary-scan chain is
selected as Data Register.
and pre-loading the scan chain without updating the DR-latch. The boundary-scan chain is
selected as Data Register.
Starting in Run-Test/Idle, the Device Identification register is accessed in the following way:
DR Size
Shows the number of bits in the data register chain when this instruction is active.
Example: 34 bits
DR input value
Shows which bit pattern to shift into the data register in the Shift-DR state when this
instruction is active. Multiple such lines may exist, e.g., to distinguish between
reads and writes.
instruction is active. Multiple such lines may exist, e.g., to distinguish between
reads and writes.
Example: aaaaaaar xxxxxxxx xxxxxxxx xxxxxxxx xx
DR output value
Shows the bit pattern shifted out of the data register in the Shift-DR state when this
instruction is active. Multiple such lines may exist, e.g., to distinguish between
reads and writes.
instruction is active. Multiple such lines may exist, e.g., to distinguish between
reads and writes.
Example: xx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxeb
Table 35-9.
Instruction Description (Continued)
Instruction
Description
Table 35-10. IDCODE Details
Instructions
Details
IR input value
00001 (0x01)
IR output value
p0001
DR Size
32
DR input value
xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
DR output value
Device Identification Register