Atmel SAM4L Xplained Pro Starter Kit Atmel ATSAM4L-XSTK ATSAM4L-XSTK Ficha De Dados
Códigos do produto
ATSAM4L-XSTK
1157
42023E–SAM–07/2013
ATSAM4L8/L4/L2
42.9.4.1
Inputs and Sample and Hold Acquisition Times
The analog voltage source must be able to charge the sample and hold (S/H) capacitor in the
ADC in order to achieve maximum accuracy. Seen externally the ADC input consists of a resis-
tor (
ADC in order to achieve maximum accuracy. Seen externally the ADC input consists of a resis-
tor (
) and a capacitor (
). In addition, the source resistance (
) must be
taken into account when calculating the required sample and hold time.
shows the
ADC input channel equivalent circuit.
Figure 42-6. ADC Input
To achieve n bits of accuracy, the
capacitor must be charged at least to a voltage of
The minimum sampling time
for a given
can be found using this formula:
for a 12 bits accuracy :
where
PSRR
(1)
fvdd=1Hz, ext ADVREFP=3.0V
VDDIO=3.6V
VDDIO=3.6V
100
dB
fvdd=2MHz, ext
ADVREFP=3.0V VDDIO=3.6V
ADVREFP=3.0V VDDIO=3.6V
50
DC supply current
(1)
VDDANA=3.6V,
ADVREFP=3.0V
ADVREFP=3.0V
1
1.8
mA
VDDANA=1.6V,
ADVREFP=1.0V
ADVREFP=1.0V
1
1.3
1.
These values are based on simulation. These values are not covered by test limits in production or characterization.
2.
These values are based on characterization and not tested in production, and valid for an input voltage between 10% to 90% of
reference voltage.
reference voltage.
Table 42-48. Unipolar mode, gain=1
R
SAMPLE
C
SAMPLE
R
SOURCE
R
SOURCE
R
SAMPLE
Analog Input
ADx
C
SAMPLE
V
IN
VDDANA/2
C
SAMPLE
V
CSAMPLE
V
≥
IN
1
2
n
1
+
(
)
–
–
(
)
×
t
SAMPLEHOLD
R
SOURCE
t
SAMPLEHOLD
R
SAMPLE
R
+
SOURCE
(
)
C
SAMPLE
(
)
×
n
1
+
(
)
2
( )
ln
×
×
≥
t
SAMPLEHOLD
R
SAMPLE
R
+
SOURCE
(
)
C
SAMPLE
(
)
×
9
×
02
,
≥
t
SAMPLEHOLD
1
2
fADC
×
------------------------
=