Linear Technology TC4270B/LTC4271: (DC1680 + DC1682) 12-Port 25.5W Demo Kit (req DC590) DC1840A DC1840A Ficha De Dados

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DC1840A
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DEMO MANUAL DC1840A
Demonstration circuit 1682a operation
Figure 5. DC1682A 12-Port PSE Daughter Card with Digital Isolation Features the LTC4270 and LTC4271
12-Port PSE Daughter Card with Digital Isolation
Demonstration circuit 1682A (Figure 5) features the 
LTC4270/LTC4271 chipset on a compact daughter card 
with digital isolation. The LTC4270/LTC4271 chipset is 
a 12-port power sourcing equipment (PSE) controller 
designed for use in IEEE 802.3at Type 1 and Type 2 (high 
power) compliant Power over Ethernet (PoE) systems. A 
transformer isolated communication protocol replaces 
expensive opto-couplers and complex isolated 3.3V supply 
resulting in significant BOM cost savings. The LTC4270/
LTC4271 chipset delivers lowest-in-industry heat dissipa-
tion by utilizing low R
ON
 external MOSFETs and 0.25Ω sense 
resistors, eliminating the need for expensive heat sinks.
Advanced power management features in the LTC4270/
LTC4271 chipset include: per port 12-bit current monitor-
ing ADCs, DAC programmable current limit, and versatile 
quick shutdown of preselected ports. PD discovery uses a 
proprietary dual mode 4-point detection mechanism ensur-
ing excellent immunity from false PD detection. Midspan 
PSEs are supported with 2-event classification and a two 
second backoff timer. The LTC4270/LTC4271 includes an 
I
2
C serial interface operable up to 1MHz.
The DC1682A demonstrates proper LTC4270/LTC4271 
board layout that is approximately the height and width 
of a 2 × 6 RJ45 connector. The compact layout is made 
possible by the small package size of key components. The 
LTC4270 is in a 7mm × 8mm QFN, while the LTC4271 is in 
a 4mm × 4mm QFN. Each port has a FDMC3612 MOSFET 
in a 3mm × 3mm power33 package. 
The daughter card inserts in the DC1680A mother board 
through J1, a polarized 34-pin connector. Isolated 3.3V 
and logic control signals are brought in on this connec-
tor. Also connected at J1 is the PoE V
EE
 supply from the 
mother board and 12 PSE controlled outputs.