Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Ficha De Dados

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ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
29.7
Two-wire Serial Interface Characteristics
 describes the requirements for devices connected to the 2-wire Serial Bus. The 
ATmega48A/PA/88A/PA/168A/PA/328/P 2-wire Serial Interface meets or exceeds these requirements under the noted 
conditions.
Timing symbols refer to 
.
Notes: 1. In ATmega48A/PA/88A/PA/168A/PA/328/P, this parameter is characterized and not 100% tested.
Table 29-19.
Two-wire Serial Bus Requirements 
Symbol
Parameter
Condition
Min.
Max
Units
V
IL
Input Low-voltage
-0.5
0.3 V
CC
V
V
IH
Input High-voltage
0.7 V
CC
V
CC
 + 0.5
V
V
Hysteresis of Schmitt Trigger Inputs
0.05 V
V
V
Output Low-voltage
3mA sink current
0
0.4
V
t
r
Rise Time for both SDA and SCL
20 + 0.1C
300
ns
t
Output Fall Time from V
IHmin
 to V
ILmax
10pF < C
b
 < 400pF
20 + 0.1C
250
ns
t
Spikes Suppressed by Input Filter
0
50
ns
I
i
Input Current each I/O Pin
0.1V
CC
 < V
i
 < 0.9V
CC
-10
10
µA
C
Capacitance for each I/O Pin
10
pF
f
SCL
SCL Clock Frequency
f
SCL
0
400
kHz
Rp
Value of Pull-up resistor
f
SCL
 
 100kHz
f
SCL
 > 100kHz
t
HD;STA
Hold Time (repeated) START Condition
f
SCL
 
 100kHz
4.0
µs
f
SCL
 > 100kHz
0.6
µs
t
LOW
Low Period of the SCL Clock
f
SCL
 
 100kHz
4.7
µs
f
SCL
 > 100kHz
1.3
µs
t
HIGH
High period of the SCL clock
f
SCL
 
 100kHz
4.0
µs
f
SCL
 > 100kHz
0.6
µs
t
SU;STA
Set-up time for a repeated START condition
f
SCL
 
 100kHz
4.7
µs
f
SCL
 > 100kHz
0.6
µs
t
HD;DAT
Data hold time
f
SCL
 
 100kHz
0
3.45
µs
f
SCL
 > 100kHz
0
0.9
µs
t
SU;DAT
Data setup time
f
SCL
 
 100kHz
250
ns
f
SCL
 > 100kHz
100
ns
t
SU;STO
Setup time for STOP condition
f
SCL
 
 100kHz
4.0
µs
f
SCL
 > 100kHz
0.6
µs
t
BUF
Bus free time between a STOP and START 
condition
f
SCL
 
 100kHz
4.7
µs
f
SCL
 > 100kHz
1.3
µs
V
CC
0,4V
3mA
----------------------------
1000ns
C
b
-----------------
V
CC
0,4V
3mA
----------------------------
300ns
C
b
--------------