Intel E3-1105C AV8062701048800 Ficha De Dados

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Intel
®
 Xeon
®
 and Intel
®
 Core™ Processors For Communications Infrastructure
Datasheet - Volume 1 of 2
May 2012
26
Document Number: 327405
-
001
3.1.1.3
Memory Down Configurations
The processor supports the following Memory Down configurations. 
3.1.2
System Memory Timing Support 
The processor supports the following DDR3 Speed Bin, CAS Write Latency (CWL), and 
command signal mode timings on the main memory interface:
• tCL = CAS Latency
• tRCD = Activate Command to READ or WRITE Command delay
• tRP = PRECHARGE Command Period
• CWL = CAS Write Latency
• Command Signal modes = 1n indicates a new command may be issued every clock 
and 2n indicates a new command may be issued every 2 clocks. Command launch 
mode programming depends on the transfer rate and memory configuration.
Table 3-3.
Supported Memory Down Configurations
 1
Raw Card 
Equivalent
Memory 
Capacity
DRAM 
Device 
Technology
DRAM 
Organization
# of 
DRAM 
Devices
# of 
Physical 
Device 
Ranks
# of 
Row/Col 
Address 
Bits
# of 
Banks 
Inside 
DRAM
Page Size
Unbuffered/Non-ECC Supported Memory Down Configurations
A
1 GB
1 Gb
 2
64 M X 16
8
2
13/10
8
8 K
2 GB
2 Gb
 2
128 M X 16
8
2
14/10
8
8 K
B
1 GB
1 Gb
 2
128 M X 8
8
1
14/10
8
8 K
2GB
2 Gb 
2
256 M X 8
8
1
15/10
8
8 K
C
512 MB
1 Gb
 2
64 M X 16
4
1
13/10
8
8 K
1 GB
2 Gb 
2
128 M X 16
4
1
14/10
8
8 K
F
2 GB
1 Gb 
2
128 M X 8
16
2
14/10
8
8 K
4 GB
2 Gb
 2
256 M X 8
16
2
15/10
8
8 K
8 GB
4 Gb
 2
512 M X 8
16
2
16/10
8
8 K
Unbuffered/ECC Supported Memory Down Configurations
D
1 GB
1 Gb 
2
128 M X 8
9
1
14/10
8
8 K
2 GB
2 Gb 
2
256 M X 8
9
1
15/10
8
8 K
E
2 GB
1 Gb
 2
128 M X 8
18
2
14/10
8
8 K
4 GB
2 Gb
 2
256 M X 8
18
2
15/10
8
8 K
8 GB
4 Gb
 2
512 M X 8
18
2
16/10
8
8 K
Notes:
1.
Interface does not support memory devices running at DDR3L (1.35 V) or DDR3U (1.25 V) Voltage Levels.
2.
Supported, but not fully validated.